On 21.11.12 18:04, Tom Rini wrote:
> On Thu, Nov 15, 2012 at 02:25:23PM +0100, Andreas Bießmann wrote:
>> Dear Ilya Yanok,
>>
>> On 07.11.2012 00:06, Ilya Yanok wrote:
>>> From: Mansoor Ahamed <mansoor.aha...@ti.com>
>>>
>>> This patch adds support for BCH8 error correction code to omap_gpmc
>>> driver. We use GPMC to generate codes/syndromes but we need ELM to find
>>> error locations from given syndrome.
>>>
>>
>> first of all, I wonder why this is so different than the kernel
>> implementation for BCH. I mean the API (and content) of this and commit
>> 8d602cf50d3bba864bc1438f486b626df69c87b3 mainline linux seems to differ.
>> The main question coming to mind is: Is the resulting OOB layout
>> compatible then?
> 
> I think this has been mostly addressed now, but for clarity:
> - We do NOT want to have > 1 layout used per NAND chip unless we must
>   (historically we did because we had ROM that couldn't use >1bit ECC).
> - We DO want to utilize the HW as this is the only easy way to get a
>   match with the BCH constants the ROM uses.
> - There are corresponding kernel patches already posted and working
>   their way along.

I'm fine with all these three points. My question came up when I looked
into this deeply the very first time cause BCH4/8 support was missing
for OMAP35xx/AM37xx devices.
I do have now working support for these (hw assisted BCH but sw
correction) like the kernel does. It needs some final polishing however
I will send it these days as RFC, would be great to get some feedback.

Best regards

Andreas Bießmann
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