## Remaining PC8 → PC10/S0ix gap (with `nvme.noacpi=1`)
- **Intel AMT disabled in BIOS:** the CSME_KVM/PMT/PTIO/USBR/SUSRAM/PSF power
gates now show Off, and 00:16.3 is gone. There is no change in sleep depth:
still PC8 and no PC10 (runs `20261018-123537`, `-123807`).
- **Intel S0ixSelftestTool `-s`** (commit 2707d34, using the system turbostat),
run with `nvme.noacpi=1` and AMT off:
- The 15 s s2idle measured Pkg%pc8 89.8, Pk%pc10 0, SYS%LPI 0.
- It set `ltr_ignore` for each of the 53 IPs in turn, cumulatively, with a 10
s s2idle after each. **None helped:** the kernel logged `CPU did not enter
Package C10` after all 57 s2idle cycles of the run. The LTR values are not the
blocker.
- The PCI PM debug output during s2idle shows the SSD and its root port
**stay in D0**, which is expected with `noacpi`:
```
nvme 0000:04:00.0: PCI PM: Suspend power state: D0 / Skipped
pcieport 0000:00:06.1: PCI PM: Suspend power state: D0 / Skipped
pcieport 0000:00:1c.7: PCI PM: Suspend power state: D3hot
(all other devices D3hot/D3cold)
```
The tool flags 00:06.1 as "D state and Link PM are not expected".
**Interpretation:** `nvme.noacpi=1` avoids the broken resume path by
keeping the CPU-attached NVMe and its root port in D0, which in turn
caps the package at PC8. With StorageD3Enable honoured, the SSD goes to
D3 and the first suspend can reach PC10 (seen on 7.0.0-34), but every
later suspend is stuck in PC2. The real fix therefore seems to be in the
NVMe/PCIe D3 resume path for the IOE root port 00:06.1, so that it can
enter D3 on every suspend and not just the first.
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https://bugs.launchpad.net/bugs/2171322
Title:
ThinkPad T16 Gen 3 (Meteor Lake): 2nd+ s2idle stuck in Package C2 (1.7
W) until reboot; fixed by nvme.noacpi=1 (StorageD3Enable)
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