To possibly clear up any confusion - the i915 driver will generate
uevents (see the tool's udev listener for an example). These events are
signs of parity errors in a specific part of the GPU's L3 cache. The
tool itself allows remapping these bad locations.

At a high level, it could work like:
1. HW detects paritity error, generates interrupt.
2. Kernel reports the uevent
3. udev rule receives the uevent, and information about the bad location (row, 
bank, subbank, slice).
4. udev either directly, or indirectly invokes intel_l3_parity to remap 
(disable; poorly named, I am sorry) that part of the cache.

Please let me know if people still have confusion.

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https://bugs.launchpad.net/bugs/1234260

Title:
  Package and use 'intel_l3_parity' binary

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