The original bug was with a customer SRIOV device which did have writable
registers.
W.r.t the Intel, that model explicitly passed with no issues.  AFAIK, one
has to have
this specific card, or one like it with writable registers.

On Mon, Oct 17, 2016 at 7:31 AM, ChristianEhrhardt <
1606...@bugs.launchpad.net> wrote:

> Intel
> http://www.intel.com/content/dam/www/public/us/en/
> documents/datasheets/ethernet-x540-datasheet.pdf
> (for my case) defines in section 9.5 the configuration space for the VF.
>
> Most entries are RO for the VF, and I found no writable register bit
> behaving in a similar manner than the referred "adding register", but I
> might overlook something.
>
> Ryan could you still verify this or are more experienced to find such a
> reg for me in the spec?
>
> --
> You received this bug notification because you are subscribed to the bug
> report.
> https://bugs.launchpad.net/bugs/1606940
>
> Title:
>   A a single PCI read or write appears twice on the PCIe bus. This
>   happens when using the SR-IOV feature with some PCI devices
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1606940/+subscriptions
>

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https://bugs.launchpad.net/bugs/1606940

Title:
  A a single PCI read or write appears twice on the PCIe bus. This
  happens when using the SR-IOV feature with some PCI devices

To manage notifications about this bug go to:
https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1606940/+subscriptions

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