Am Donnerstag, den 10.05.2007, 16:17 +1000 schrieb Greg Ungerer:
> Hi Per,
> 
> Per Hallsmark wrote:
> > Dear nommu gurus!
> > 
> > I'm back down the work-pile and trying porting linux 2.6 on a ARM nommu 
> > processor.
> > The boot seems going farly well, but as soon as userland start, it goes 
> > to some parallell universe or something.
> > Unfortunally this platform hasn't any jtag interface so it's a struggle 
> > to continue.
> > 
> > I wonder if any has already made a 2.6 port for this processor?
> > Until now, I've extended the proc-arm7tdmi.S a bit to include a 
> > PROCESSOR_ID for this
> > which seems to be a arm7tdmi with armv4 cache. However, in the latest 
> > uClinux, the 2.4 tree has
> > it's own proc-oki-ml675001.S, indicating CP15, TLB's etc.
> > Unfortunally proc-oki-ml675001.S isn't brought forward to 2.6 AFAIK.
> > Would it be a good way to try this path, bringing in a new proc.S-file?
> 
> I suspect it should be handled all in proc-arm7tdmi.S for 2.6
> kernels. Given it will be and ARM7 core there should be no need
> to create a new set of asm handlers.
> 
> Regards
> Greg
> 

I think that has been splitted up in 2.6, the cache instructions seem to
be in cache-*.S. You should make sure that 
* cache-v4.S is actually included
* the correct CONFIG options are used (CONFIG_CPU_CP15,...) 
* and look into the manual if your cpu really supports those
instructions.

The ARM7TDMIs that I have seen don't have those mcr instructions, it
seems that each manufacturer brews his own soup and you have to write
your own asm handlers for cache handling.

Regards,
Erwin


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