Quoth Sean McGranaghan: > I could not get the mcf_qspi driver to leave the chip select asserted > after the 16th word in the transfer. (I tried all manner of > configurations using the QCRn[CONT] bit (bit 15 in the Command > Register) and QWR[CSIV] bit (bit 12 of the Wrap Register). The short > of it was that I had to pitch the mcf_qspi driver and write my own. > My own driver manages the chip selects in software and only transfers > a single word at a time through the command queue.
I had to do something similar on the 5272, since it appears to be a design limitation of the SPI controller in the processor -- when the command queue is completed the SPI module switches off and the chipselects return to their "idle" state (as defined by the GPIO registers, not the QSPI registers), regardless of any flags you put on the command words. I briefly experimented with changing the "idle" level but I couldn't get it to work; it'd either screw up the transfers themselves or it'd still create a brief de-assert at the end of the queue. Possibly I didn't try long enough, though :) In my case there was only one device that needed such long transfers, so I added a separate chipselect for it via a GPIO line so it could be controlled more directly. _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
