David Wooff wrote: > Hi, > re subject, would it be inappropriate to use read and write calls to > communicate with a 32 bit wide interface? > The fpga cannot accept byte accesses and nor do I want it to anyway. > So, should I control the file position so it can > only ever be on 32 bit boundaries and accept accesses in multiples of 4 > bytes (returning errors otherwise), > or would I be better off acessing via specific ioctl calls (passing in a > pointer to a structure specifying the access) > and not using normal read and write calls? The former seems unnatural > and therefore probably plain wrong.
Does the data stream specification only support 3 bit entities or does it allow for 8 bit entities, too ? If 8 bit is possible, the interface hardware should support this by allowing for 1, (2, 3,) and 4 byte transfers. If the hardware allows to 1, (2, 3,) and 4 byte transfers, the driver supposedly should be done as a standard byte-stream thingy, internally handling the multiplexing / demultiplexing. Is this an Altera FPGA ? Here the Avalon bus should be able to handle processor I/O access with 8, 16, and 32 bit onto hardware devices with 8, 16, and 32 (and more) with automatic multiplexing/demultiplexing. But AFAIK, there is a bug (in older Quartus software) that creates erroneous multiple identical write accesses in some of these cases. -Michael _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
