status = 61 <--- 0x61 - a value that is stored in UnLSR (UART Line Status Register). UnLSR register description can be found in LPC2468 user manual rev. 4 ( http://www.nxp.com/documents/data_sheet/LPC2468.pdf ) on page 432. Below is a part of it:0x61 = 0110 0001 || | || +-----> Overrun Error |+-----------> Transmitter Holding Register Empty (THRE) +------------> Transmitter Empty (TEMT)So.. how should i treat UARTs to except this kind of overruns? I send no more than 16 bytes every 80-100 ms and it tells me "overrun".
Bit 0 is actually "Data Ready". Bit 1 is "Overrun Error" _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
