Hi All, The following patch series is a major re-working of the cache code for the ColdFire CPU family. The current code is a set of ad-hoc macros and constant defines that does "some" cacheing setup and operation. But it is not done consistently for all ColdFire members, and is wrong in some specific cases. It also doesn't support split caches, or selecting write-thru or copy-back modes where these types of options are available.
These patches create appropriate definitions for all cache registers and their bit flags (for all ColdFire cache controllers). It creates new config options for selecting cacheing options on CPU varients that support them, like split instruction/data caching on the version 2 ColdFire cores, and selection of write-through or copy-back on version 3 and 4 cores. And lastly they optimize flushing by separating out the instruction and data caching routines. Obviously this pretty much affects all ColdFire types, so these changes have the potential to break every ColdFire target :-) Thus this is a request for feedback and testing of these changes. I have tested them on the following: 5208, 5249, 5272, 5275, 5307 and 5475. And these all check out. I generated these patches relative to the m68knommu git tree, but I think they shouldn't be too hard to apply to something like 2.6.37-rc1, maybe a little more tricky against 2.6.36 or older. Ofcourse you can pull them from the for-linus branch of the m68knommu git tree as well. Regards Greg _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
