Hi list, while porting kernel 3.0 to a 5208 based hardware I stumbled across a strange problem with GPIO/SPI. The mcfqspi driver used the gpio subsystem to toggle the chip-select lines. The chipselect line goes low (as expected) when trying to access a slave (spi flash) but stays low forever. There was a small mistake in the gpio port assignment which i fixed (now at least the CS2 line goes low): ================================================================================== diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 621238f..330c66f 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -93,42 +93,43 @@ static struct resource m520x_qspi_resources[] = { #define MCFQSPI_CS0 62 #define MCFQSPI_CS1 63 -#define MCFQSPI_CS2 44 +#define MCFQSPI_CS2 43 ==================================================================================
When trying to toggle the gpio lines from the userspace I cannot reproduce this problem, the CS2 can only be set to both low and high. Interestingly CS1(=gpio63) can be controlled from userspace while CS0(=gpio62) cannot. gpio62 neither reacts on the direction flag nor on writes to the value while CS[12] (=gpio63 and gpio43) do. By the way: There are wrong address for the GPIO data registers in arch/m68k/include/asm/m520xsim.h. It seems the ports BUSCTL and BE are not mapped which shifts only the PPDSRs, see MCF5208 Reference Manual Page 13-10, Table 13-3. diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index b6bf2c5..9e9aefb 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -90,6 +90,7 @@ #define MCFGPIO_PDDR_FECH 0xFC0A4013 #define MCFGPIO_PDDR_FECL 0xFC0A4014 +/* #define MCFGPIO_PPDSDR_BUSCTL 0xFC0A401A #define MCFGPIO_PPDSDR_BE 0xFC0A401B #define MCFGPIO_PPDSDR_CS 0xFC0A401C @@ -99,6 +100,17 @@ #define MCFGPIO_PPDSDR_UART 0xFC0A4021 #define MCFGPIO_PPDSDR_FECH 0xFC0A4021 #define MCFGPIO_PPDSDR_FECL 0xFC0A4022 +*/ +#define MCFGPIO_PPDSDR_CS 0xFC0A401A +#define MCFGPIO_PPDSDR_FECI2C 0xFC0A401B +#define MCFGPIO_PPDSDR_QSPI 0xFC0A401C +#define MCFGPIO_PPDSDR_TIMER 0xFC0A401D +#define MCFGPIO_PPDSDR_UART 0xFC0A401E +#define MCFGPIO_PPDSDR_FECH 0xFC0A401F +#define MCFGPIO_PPDSDR_FECL 0xFC0A4020 +/* WARNING: Dummy on 5208 ! ! ! ! ! */ +#define MCFGPIO_PPDSDR_BUSCTL 0xFC0A4021 +#define MCFGPIO_PPDSDR_BE 0xFC0A4022 Maybe you can help me out of this confusion. I guess there is still some error in the port definitions but i can't find it. Thanks in advance! Best regards, Peter_______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev