On Wed, Mar 16, 2011 at 7:43 PM, Mike Frysinger <[email protected]> wrote: > On Wednesday, March 16, 2011 02:18:29 Øyvind Harboe wrote: >> > cant these be associated with some IDCODE ? if these parts could be >> > added to xilinx/PARTS and have appropriate STEPPINGS files associated >> > with them, that'd be great ... >> >> I don't know what those IDCODE's are and it doesn't seem to be >> necessary. UrJTAG figures out which file to use.... > > how can UrJTAG figure out what file to use if you dont associate the files > with an IDCODE ? saying "include xxx" is not UrJTAG figuring things out, it's > the user explicitly telling UrJTAG the file.
Uuuuhhh.... I don't know, I do the following: bsdl path <path to bsdl> cable ZY1000 server=10.0.0.167 pod reset=0 detect get signal IO_A7 scan svf test.svf stop progress ref_freq=100000 => works Initializing Zylin ZY1000 JTAG probe IR length: 6 Chain length: 1 Device Id: 00000010011000011000000010010011 (0x02618093) Filename: bsdl/xc3s200an_ft256.bsd IO_A7 = 1 Parsing 43030/43035 ( 99%) -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer ------------------------------------------------------------------------------ Colocation vs. Managed Hosting A question and answer guide to determining the best fit for your organization - today and in the future. http://p.sf.net/sfu/internap-sfd2d _______________________________________________ UrJTAG-development mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/urjtag-development
