I have just committed this patch to fold bfin-part.c, bfin-part.h,
bfin-part-bfin.c into bfin.c and bfin.h. Source code in src/bfin was
organized in such a way to ease adding new Blackfin processors. But it
never happened in the last several years. And it becomes maintenance
burden now. If it happens in future, we can look it up in the
repository and add it back.
Regards,
Jie
* include/urjtag/bfin.h (struct emu_oab): Remove. Move its dbgctl_*
and dbgstat_* to ...
(struct bfin_part_data): ... here. Remove field emu_oab.
(EMU_OAB): Remove.
(part_sticky_in_reset): Remove.
* src/bfin/bfin.c (<urjtag/cable.h>): Include.
("bfin-part.h"): Dont' include.
(bfin_dbgctl_init): New.
(bfin_dbgstat_value): New.
(PART_DBGCTL_CLEAR_OR_SET_BIT): Don't use _part_* functions.
(PART_DBGCTL_IS): Likewise.
(PART_DBGSTAT_BIT_IS): Likewise.
(PART_DBGSTAT_CLEAR_BIT): Likewise.
(PART_DBGSTAT_SET_BIT): Likewise.
(part_dbgstat_emucause): Likewise.
(chain_dbgstat_get): Likewise.
(part_dbgstat_get): Likewise.
(part_sticky_in_reset): Remove.
(chain_wait_reset): Don't call part_sticky_in_reset.
(part_wait_reset): Likewise.
(bfin_part_data_initializer): Define.
(bfin_wait_ready): New.
(bfin_part_init): New.
(_bfin_part_init): New.
* src/bfin/bfin-part-bfin.c: Remove.
* src/bfin/bfin-part.c: Remove.
* src/bfin/bfin-part.h: Remove.
* src/bfin/Makefile.am (libbfin_la_SOURCES): Remove bfin-part.c,
bfin-part.h and bfin-part-bfin.c.
Index: include/urjtag/bfin.h
===================================================================
--- include/urjtag/bfin.h (revision 2005)
+++ include/urjtag/bfin.h (working copy)
@@ -66,32 +66,14 @@ enum core_regnum
#define ITEST_DATA0 0xffe01400
#define ITEST_DATA1 0xffe01404
-/* OAB stands for Operations and Bits. */
-
-struct emu_oab
+struct bfin_part_data
{
- /* Operations */
-
- void (*dbgctl_init) (urj_part_t *part, uint16_t value);
- uint16_t (*dbgstat_value) (urj_part_t *part);
-
- /* Get the MMRs needed to access this L1 address. */
- void (*test_command_mmrs) (urj_part_t *part, uint32_t addr, int icache,
- uint32_t *command_addr,
- uint32_t *data0_addr, uint32_t *data1_addr);
-
- /* Generate TEST_COMMAND from ADDR and W(rite), and return the MMRs
- that need to be used for this access. */
- void (*test_command) (urj_part_t *part, uint32_t addr, int w,
- uint32_t command_addr, uint32_t *command_value);
-
- /* No existing Blackfin processors use this. It should be 0. */
- int dbgctl_dbgstat_in_one_chain;
+ int bypass;
+ int scan;
- /* No existing Blackfin processors use this. It should be 0. */
- int sticky_in_reset;
+ uint16_t dbgctl;
+ uint16_t dbgstat;
- /* Bits */
uint16_t dbgctl_sram_init;
uint16_t dbgctl_wakeup;
uint16_t dbgctl_sysrst;
@@ -124,26 +106,19 @@ struct emu_oab
uint16_t dbgstat_emudoovf;
uint16_t dbgstat_emudif;
uint16_t dbgstat_emudof;
-};
-struct bfin_part_data
-{
- int bypass;
- const struct emu_oab *emu_oab;
- int scan;
- uint16_t dbgctl;
- uint16_t dbgstat;
uint64_t emuir_a;
uint64_t emuir_b;
+
uint64_t emudat_out;
uint64_t emudat_in;
+
uint32_t emupc;
uint32_t emupc_orig;
};
#define BFIN_PART_DATA(part) ((struct bfin_part_data *)((part)->params->data))
#define BFIN_PART_BYPASS(part) (BFIN_PART_DATA (part)->bypass)
-#define EMU_OAB(part) (BFIN_PART_DATA (part)->emu_oab)
#define BFIN_PART_SCAN(part) (BFIN_PART_DATA (part)->scan)
#define BFIN_PART_WPSTAT(part) (BFIN_PART_DATA (part)->wpstat)
@@ -286,7 +261,6 @@ uint32_t part_emupc_get (urj_chain_t *,
void chain_dbgstat_clear_ovfs (urj_chain_t *);
void part_dbgstat_clear_ovfs (urj_chain_t *, int);
void chain_check_emuready (urj_chain_t *);
-int part_sticky_in_reset (urj_chain_t *, int);
void chain_wait_in_reset (urj_chain_t *);
void part_wait_in_reset (urj_chain_t *, int);
void chain_wait_reset (urj_chain_t *);
Index: src/bfin/bfin-part-bfin.c
===================================================================
--- src/bfin/bfin-part-bfin.c (revision 2005)
+++ src/bfin/bfin-part-bfin.c (working copy)
@@ -1,315 +0,0 @@
-/* Copyright (C) 2008, 2009, 2010 Analog Devices, Inc.
- *
- * This file is subject to the terms and conditions of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2, or (at your option) any later
- * version. See the file COPYING for more details.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Non-GPL License is also available. Please contact
- * <[email protected]> for more information.
- *
- * Implementation of `Blackfin' target for the GDB proxy server.
- */
-
-
-#include <sysdep.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-
-#include <urjtag/part.h>
-#include <urjtag/chain.h>
-#include <urjtag/cable.h>
-#include <urjtag/data_register.h>
-#include <urjtag/part_instruction.h>
-#include <urjtag/tap_register.h>
-#include <urjtag/bfin.h>
-#include <urjtag/log.h>
-
-/* The helper functions for Blackfin DBGCTL and DBGSTAT operations. */
-
-static void
-bfin_dbgctl_init (urj_part_t *part, uint16_t v)
-{
- register_init_value (part->active_instruction->data_register->in, v);
-}
-
-static uint16_t
-bfin_dbgstat_value (urj_part_t *part)
-{
- return urj_tap_register_get_value (part->active_instruction->data_register->out);
-}
-
-static void
-bfin_test_command_mmrs (urj_part_t *part, uint32_t addr, int icache,
- uint32_t *command_addr,
- uint32_t *data0_addr, uint32_t *data1_addr)
-{
- if (icache) {
- *command_addr = ITEST_COMMAND;
- *data0_addr = ITEST_DATA0;
- *data1_addr = ITEST_DATA1;
- } else {
- *command_addr = DTEST_COMMAND;
- *data0_addr = DTEST_DATA0;
- *data1_addr = DTEST_DATA1;
- }
-}
-
-static void
-bfin_test_command (urj_part_t *part, uint32_t addr, int w,
- uint32_t command_addr, uint32_t *command_value)
-{
- /* The shifting here is a bit funky, but should be straight forward and
- easier to maintain than hand coded masks. So, start with the break
- down of the [DI]TEST_COMMAND MMR in the HRM and follow along:
-
- We need to put bit 11 of the address into bit 26 of the MMR. So first
- we mask off ADDR[11] with:
- (addr & (1 << 11))
-
- Then we shift it from its current position (11) to its new one (26):
- ((...) << (26 - 11))
- */
-
- /* Start with the bits ITEST/DTEST share. */
- *command_value =
- ((addr & (0x03 << 12)) << (16 - 12)) | /* ADDR[13:12] -> MMR[17:16] */
- ((addr & (0x01 << 14)) << (14 - 14)) | /* ADDR[14] -> MMR[14] */
- ((addr & (0xff << 3)) << ( 3 - 3)) | /* ADDR[10:3] -> MMR[10:3] */
- (1 << 2) | /* 1 (data) -> MMR[2] */
- (w << 1); /* read/write -> MMR[1] */
-
- /* Now for the bits that aren't the same. */
- if (command_addr == ITEST_COMMAND)
- *command_value |=
- ((addr & (0x03 << 10)) << (26 - 10)); /* ADDR[11:10] -> MMR[27:26] */
- else
- *command_value |=
- ((addr & (0x01 << 11)) << (26 - 11)) | /* ADDR[11] -> MMR[26] */
- ((addr & (0x01 << 21)) << (24 - 21)); /* ADDR[21] -> MMR[24] */
-
- /* Now, just for fun, some parts are slightly different. */
- if (command_addr == DTEST_COMMAND)
- {
- /* BF50x has no additional needs. */
- if (!strcmp (part->part, "BF518"))
- {
- /* MMR[23]:
- 0 - Data Bank A (0xff800000) / Inst Bank A (0xffa00000)
- 1 - Data Bank B (0xff900000) / Inst Bank B (0xffa04000)
- */
- if ((addr & 0xfff04000) == 0xffa04000 ||
- (addr & 0xfff00000) == 0xff900000)
- *command_value |= (1 << 23);
- }
- else if (!strcmp (part->part, "BF526") ||
- !strcmp (part->part, "BF527") ||
- !strcmp (part->part, "BF533") ||
- !strcmp (part->part, "BF534") ||
- !strcmp (part->part, "BF537") ||
- !strcmp (part->part, "BF538") ||
- !strcmp (part->part, "BF548") ||
- !strcmp (part->part, "BF548M"))
- {
- /* MMR[23]:
- 0 - Data Bank A (0xff800000) / Inst Bank A (0xffa00000)
- 1 - Data Bank B (0xff900000) / Inst Bank B (0xffa08000)
- */
- if ((addr & 0xfff08000) == 0xffa08000 ||
- (addr & 0xfff00000) == 0xff900000)
- *command_value |= (1 << 23);
- }
- else if (!strcmp (part->part, "BF561"))
- {
- /* MMR[23]:
- 0 - Data Bank A (Core A: 0xff800000 Core B: 0xff400000)
- Inst Bank A (Core A: 0xffa00000 Core B: 0xff600000)
- 1 - Data Bank B (Core A: 0xff900000 Core B: 0xff500000)
- N/A for Inst (no Bank B)
- */
- uint32_t hi = (addr >> 20);
- if (hi == 0xff9 || hi == 0xff5)
- *command_value |= (1 << 23);
- }
- else if (!strcmp (part->part, "BF592"))
- {
- /* ADDR[15] -> MMR[15]
- MMR[22]:
- 0 - L1 Inst (0xffa00000)
- 1 - L1 ROM (0xffa10000)
- */
- *command_value |= (addr & (1 << 15));
- if ((addr >> 16) == 0xffa1)
- *command_value |= (1 << 22);
- }
- }
-}
-
-static const struct emu_oab bfin_emu_oab =
-{
- bfin_dbgctl_init,
- bfin_dbgstat_value,
-
- bfin_test_command_mmrs,
- bfin_test_command,
-
- 0, /* dbgctl_dbgstat_in_one_chain */
- 0, /* sticky_in_reset */
-
- 0x1000, /* DBGCTL_SRAM_INIT */
- 0x0800, /* DBGCTL_WAKEUP */
- 0x0400, /* DBGCTL_SYSRST */
- 0x0200, /* DBGCTL_ESSTEP */
- 0x0000, /* DBGCTL_EMUDATSZ_32 */
- 0x0080, /* DBGCTL_EMUDATSZ_40 */
- 0x0100, /* DBGCTL_EMUDATSZ_48 */
- 0x0180, /* DBGCTL_EMUDATSZ_MASK */
- 0x0040, /* DBGCTL_EMUIRLPSZ_2 */
- 0x0000, /* DBGCTL_EMUIRSZ_64 */
- 0x0010, /* DBGCTL_EMUIRSZ_48 */
- 0x0020, /* DBGCTL_EMUIRSZ_32 */
- 0x0030, /* DBGCTL_EMUIRSZ_MASK */
- 0x0008, /* DBGCTL_EMPEN */
- 0x0004, /* DBGCTL_EMEEN */
- 0x0002, /* DBGCTL_EMFEN */
- 0x0001, /* DBGCTL_EMPWR */
-
- 0x8000, /* DBGSTAT_LPDEC1 */
- 0x0000, /* No DBGSTAT_IN_POWRGATE for bfin */
- 0x4000, /* DBGSTAT_CORE_FAULT */
- 0x2000, /* DBGSTAT_IDLE */
- 0x1000, /* DBGSTAT_IN_RESET */
- 0x0800, /* DBGSTAT_LPDEC0 */
- 0x0400, /* DBGSTAT_BIST_DONE */
- 0x03c0, /* DBGSTAT_EMUCAUSE_MASK */
- 0x0020, /* DBGSTAT_EMUACK */
- 0x0010, /* DBGSTAT_EMUREADY */
- 0x0008, /* DBGSTAT_EMUDIOVF */
- 0x0004, /* DBGSTAT_EMUDOOVF */
- 0x0002, /* DBGSTAT_EMUDIF */
- 0x0001, /* DBGSTAT_EMUDOF */
-};
-
-static void
-bfin_wait_ready (void *data)
-{
- urj_chain_t *chain = (urj_chain_t *) data;
-
- /* The following default numbers of wait clock for various cables are
- tested on a BF537 stamp board, on which U-Boot is running.
- CCLK is set to 62MHz and SCLK is set to 31MHz, which is the lowest
- frequency I can set in BF537 stamp Linux kernel.
-
- The test is done by dumping memory from 0x20000000 to 0x20000010 using
- GDB and gdbproxy:
-
- (gdb) dump memory u-boot.bin 0x20000000 0x20000010
- (gdb) shell hexdump -C u-boot.bin
-
- With an incorrect number of wait clocks, the first 4 bytes will be
- duplicated by the second 4 bytes. */
-
- if (bfin_wait_clocks == -1)
- {
- urj_cable_t *cable = chain->cable;
- uint32_t frequency = cable->frequency;
- const char *name = cable->driver->name;
-
- if (strcmp (name, "gnICE+") == 0)
- {
- if (frequency <= 6000000)
- bfin_wait_clocks = 5;
- else if (frequency <= 15000000)
- bfin_wait_clocks = 12;
- else /* <= 30MHz */
- bfin_wait_clocks = 21;
- }
- else if (strcmp (name, "gnICE") == 0)
- bfin_wait_clocks = 3;
- else if (strcmp (name, "ICE-100B") == 0)
- {
- if (frequency <= 5000000)
- bfin_wait_clocks = 5;
- else if (frequency <= 10000000)
- bfin_wait_clocks = 11;
- else if (frequency <= 17000000)
- bfin_wait_clocks = 19;
- else /* <= 25MHz */
- bfin_wait_clocks = 30;
- }
-
- if (bfin_wait_clocks == -1)
- {
- bfin_wait_clocks = 30;
- urj_warning (_("%s: untested cable, set wait_clocks to %d\n"),
- name, bfin_wait_clocks);
- }
- }
-
- urj_tap_chain_defer_clock (chain, 0, 0, bfin_wait_clocks);
-}
-
-static void
-bfin_part_init (urj_part_t *part)
-{
- int i;
-
- if (!part || !part->params)
- goto error;
-
- part->params->free = free;
- part->params->wait_ready = bfin_wait_ready;
- part->params->data = malloc (sizeof (struct bfin_part_data));
- EMU_OAB (part) = &bfin_emu_oab;
-
- BFIN_PART_BYPASS (part) = 0;
-
- if (!part->active_instruction)
- goto error;
- for (i = 0; i < NUM_SCANS; i++)
- if (strcmp (part->active_instruction->name, scans[i]) == 0)
- break;
-
- if (i == NUM_SCANS)
- goto error;
-
- BFIN_PART_SCAN (part) = i;
- BFIN_PART_DBGCTL (part) = 0;
- BFIN_PART_DBGSTAT (part) = 0;
- BFIN_PART_EMUIR_A (part) = INSN_ILLEGAL;
- BFIN_PART_EMUIR_B (part) = INSN_ILLEGAL;
- BFIN_PART_EMUDAT_OUT (part) = 0;
- BFIN_PART_EMUDAT_IN (part) = 0;
- BFIN_PART_EMUPC (part) = -1;
- return;
-
- error:
- urj_warning (_("Blackfin part is missing instructions\n"));
-}
-
-extern void bfin_init (void);
-
-void
-bfin_init (void)
-{
- /* Keep in sync with data/analog/PARTS */
- urj_part_init_register ("BF506", bfin_part_init);
- urj_part_init_register ("BF518", bfin_part_init);
- urj_part_init_register ("BF526", bfin_part_init);
- urj_part_init_register ("BF527", bfin_part_init);
- urj_part_init_register ("BF533", bfin_part_init);
- urj_part_init_register ("BF534", bfin_part_init);
- urj_part_init_register ("BF537", bfin_part_init);
- urj_part_init_register ("BF538", bfin_part_init);
- urj_part_init_register ("BF548", bfin_part_init);
- urj_part_init_register ("BF548M", bfin_part_init);
- urj_part_init_register ("BF561", bfin_part_init);
- urj_part_init_register ("BF592", bfin_part_init);
-}
Index: src/bfin/bfin.c
===================================================================
--- src/bfin/bfin.c (revision 2005)
+++ src/bfin/bfin.c (working copy)
@@ -26,12 +26,12 @@
#include <unistd.h>
#include <urjtag/chain.h>
+#include <urjtag/cable.h>
#include <urjtag/tap_state.h>
#include <urjtag/tap_register.h>
#include <urjtag/data_register.h>
#include <urjtag/part_instruction.h>
#include <urjtag/bfin.h>
-#include "bfin-part.h"
const char * const scans[] = {
"IDCODE",
@@ -219,6 +219,20 @@ part_scan_select (urj_chain_t *chain, in
return 0;
}
+/* The helper functions for Blackfin DBGCTL and DBGSTAT operations. */
+
+static void
+bfin_dbgctl_init (urj_part_t *part, uint16_t v)
+{
+ register_init_value (part->active_instruction->data_register->in, v);
+}
+
+static uint16_t
+bfin_dbgstat_value (urj_part_t *part)
+{
+ return urj_tap_register_get_value (part->active_instruction->data_register->out);
+}
+
#define PART_DBGCTL_CLEAR_OR_SET_BIT(name) \
static void \
part_dbgctl_bit_clear_or_set_##name (urj_chain_t *chain, int n, int set) \
@@ -226,8 +240,11 @@ part_scan_select (urj_chain_t *chain, in
urj_part_t *part = chain->parts->parts[n]; \
uint16_t dbgctl = BFIN_PART_DBGCTL (part); \
\
- dbgctl = _part_dbgctl_bit_clear_or_set_##name (part, dbgctl, set); \
- _part_dbgctl_init (part, dbgctl); \
+ if (set) \
+ dbgctl |= BFIN_PART_DATA (part)->dbgctl_##name; \
+ else \
+ dbgctl &= ~BFIN_PART_DATA (part)->dbgctl_##name; \
+ bfin_dbgctl_init (part, dbgctl); \
BFIN_PART_DBGCTL (part) = dbgctl; \
}
@@ -258,7 +275,11 @@ part_scan_select (urj_chain_t *chain, in
part_dbgctl_is_##name (urj_chain_t *chain, int n) \
{ \
urj_part_t *part = chain->parts->parts[n]; \
- return _part_dbgctl_is_##name (part, BFIN_PART_DBGCTL (part)); \
+ uint16_t dbgctl = BFIN_PART_DBGCTL (part); \
+ if (dbgctl & BFIN_PART_DATA (part)->dbgctl_##name) \
+ return 1; \
+ else \
+ return 0; \
}
#define PART_DBGCTL_CLEAR_BIT(name) \
@@ -301,7 +322,11 @@ part_scan_select (urj_chain_t *chain, in
part_dbgstat_is_##name (urj_chain_t *chain, int n) \
{ \
urj_part_t *part = chain->parts->parts[n]; \
- return _part_dbgstat_is_##name (part, BFIN_PART_DBGSTAT (part)); \
+ uint16_t dbgstat = BFIN_PART_DBGSTAT (part); \
+ if (dbgstat & BFIN_PART_DATA (part)->dbgstat_##name) \
+ return 1; \
+ else \
+ return 0; \
}
#define PART_DBGSTAT_CLEAR_BIT(name) \
@@ -310,8 +335,7 @@ part_scan_select (urj_chain_t *chain, in
{ \
urj_part_t *part = chain->parts->parts[n]; \
urj_tap_register_t *r = part->active_instruction->data_register->in; \
- BFIN_PART_DBGSTAT (part) \
- = _part_dbgstat_bit_clear_##name (part, BFIN_PART_DBGSTAT (part)); \
+ BFIN_PART_DBGSTAT (part) &= ~BFIN_PART_DATA (part)->dbgstat_##name; \
register_init_value (r, BFIN_PART_DBGSTAT (part)); \
}
@@ -321,8 +345,7 @@ part_scan_select (urj_chain_t *chain, in
{ \
urj_part_t *part = chain->parts->parts[n]; \
urj_tap_register_t *r = part->active_instruction->data_register->in; \
- BFIN_PART_DBGSTAT (part) \
- = _part_dbgstat_bit_set_##name (part, BFIN_PART_DBGSTAT (part)); \
+ BFIN_PART_DBGSTAT (part) |= BFIN_PART_DATA (part)->dbgstat_##name; \
register_init_value (r, BFIN_PART_DBGSTAT (part)); \
}
@@ -371,7 +394,7 @@ part_dbgstat_emucause (urj_chain_t *chai
uint16_t emucause;
part = chain->parts->parts[n];
- mask = _part_dbgstat_emucause_mask (part);
+ mask = BFIN_PART_DATA (part)->dbgstat_emucause_mask;
emucause = BFIN_PART_DBGSTAT (part) & mask;
while (!(mask & 0x1))
@@ -391,24 +414,12 @@ chain_dbgstat_get (urj_chain_t *chain)
chain_scan_select (chain, DBGSTAT_SCAN);
- /* After doing a shiftDR you always must eventually do an
- update-DR. The dbgstat and dbgctl registers are in the same scan
- chain. Therefore when you want to read dbgstat you have to be
- careful not to corrupt the dbgctl register in the process. So you
- have to shift out the value that is currently in the dbgctl and
- dbgstat registers, then shift back the same value into the dbgctl
- so that when you do an updateDR you will not change the dbgctl
- register when all you wanted to do is read the dbgstat value. */
-
for (i = 0; i < chain->parts->len; i++)
{
part = chain->parts->parts[i];
if (part_is_bypassed (chain, i))
continue;
-
- if (_part_dbgctl_dbgstat_in_one_chain (part))
- _part_dbgctl_init (part, BFIN_PART_DBGCTL (part));
}
urj_tap_chain_shift_data_registers_mode (chain, 1, 1, URJ_CHAIN_EXITMODE_UPDATE);
@@ -419,7 +430,7 @@ chain_dbgstat_get (urj_chain_t *chain)
continue;
part = chain->parts->parts[i];
- BFIN_PART_DBGSTAT (part) = _part_dbgstat_value (part);
+ BFIN_PART_DBGSTAT (part) = bfin_dbgstat_value (part);
}
}
@@ -432,16 +443,11 @@ part_dbgstat_get (urj_chain_t *chain, in
part_scan_select (chain, n, DBGSTAT_SCAN);
- /* See above comments. */
-
part = chain->parts->parts[n];
- if (_part_dbgctl_dbgstat_in_one_chain (part))
- _part_dbgctl_init (part, BFIN_PART_DBGCTL (part));
-
urj_tap_chain_shift_data_registers_mode (chain, 1, 1, URJ_CHAIN_EXITMODE_UPDATE);
- BFIN_PART_DBGSTAT (part) = _part_dbgstat_value (part);
+ BFIN_PART_DBGSTAT (part) = bfin_dbgstat_value (part);
}
void
@@ -566,13 +572,6 @@ part_check_emuready (urj_chain_t *chain,
assert (emuready);
}
-int
-part_sticky_in_reset (urj_chain_t *chain, int n)
-{
- urj_part_t *part = chain->parts->parts[n];
- return _part_sticky_in_reset (part);
-}
-
void
chain_wait_in_reset (urj_chain_t *chain)
{
@@ -648,7 +647,7 @@ chain_wait_reset (urj_chain_t *chain)
if (part_is_bypassed (chain, i))
continue;
- if (part_dbgstat_is_in_reset (chain, i) && !part_sticky_in_reset (chain, i))
+ if (part_dbgstat_is_in_reset (chain, i))
{
in_reset = 1;
break;
@@ -675,7 +674,7 @@ part_wait_reset (urj_chain_t *chain, int
try_again:
part_dbgstat_get (chain, n);
- if (part_dbgstat_is_in_reset (chain, n) && !part_sticky_in_reset (chain, n))
+ if (part_dbgstat_is_in_reset (chain, n))
in_reset = 1;
else
in_reset = 0;
@@ -1746,3 +1745,163 @@ part_mmr_write (urj_chain_t *chain, int
part_register_set (chain, n, REG_P0, p0);
part_register_set (chain, n, REG_R0, r0);
}
+
+struct bfin_part_data bfin_part_data_initializer =
+{
+ 0, /* bypass */
+ 0, /* scan */
+
+ 0, /* dbgctl */
+ 0, /* dbgstat */
+
+ 0x1000, /* DBGCTL_SRAM_INIT */
+ 0x0800, /* DBGCTL_WAKEUP */
+ 0x0400, /* DBGCTL_SYSRST */
+ 0x0200, /* DBGCTL_ESSTEP */
+ 0x0000, /* DBGCTL_EMUDATSZ_32 */
+ 0x0080, /* DBGCTL_EMUDATSZ_40 */
+ 0x0100, /* DBGCTL_EMUDATSZ_48 */
+ 0x0180, /* DBGCTL_EMUDATSZ_MASK */
+ 0x0040, /* DBGCTL_EMUIRLPSZ_2 */
+ 0x0000, /* DBGCTL_EMUIRSZ_64 */
+ 0x0010, /* DBGCTL_EMUIRSZ_48 */
+ 0x0020, /* DBGCTL_EMUIRSZ_32 */
+ 0x0030, /* DBGCTL_EMUIRSZ_MASK */
+ 0x0008, /* DBGCTL_EMPEN */
+ 0x0004, /* DBGCTL_EMEEN */
+ 0x0002, /* DBGCTL_EMFEN */
+ 0x0001, /* DBGCTL_EMPWR */
+
+ 0x8000, /* DBGSTAT_LPDEC1 */
+ 0x0000, /* No DBGSTAT_IN_POWRGATE for bfin */
+ 0x4000, /* DBGSTAT_CORE_FAULT */
+ 0x2000, /* DBGSTAT_IDLE */
+ 0x1000, /* DBGSTAT_IN_RESET */
+ 0x0800, /* DBGSTAT_LPDEC0 */
+ 0x0400, /* DBGSTAT_BIST_DONE */
+ 0x03c0, /* DBGSTAT_EMUCAUSE_MASK */
+ 0x0020, /* DBGSTAT_EMUACK */
+ 0x0010, /* DBGSTAT_EMUREADY */
+ 0x0008, /* DBGSTAT_EMUDIOVF */
+ 0x0004, /* DBGSTAT_EMUDOOVF */
+ 0x0002, /* DBGSTAT_EMUDIF */
+ 0x0001, /* DBGSTAT_EMUDOF */
+
+ INSN_ILLEGAL, /* emuir_a */
+ INSN_ILLEGAL, /* emuir_b */
+
+ 0, /* emudat_out */
+ 0, /* emudat_in */
+
+ -1, /* emupc */
+ -1, /* emupc_orig */
+};
+
+static void
+bfin_wait_ready (void *data)
+{
+ urj_chain_t *chain = (urj_chain_t *) data;
+
+ /* The following default numbers of wait clock for various cables are
+ tested on a BF537 stamp board, on which U-Boot is running.
+ CCLK is set to 62MHz and SCLK is set to 31MHz, which is the lowest
+ frequency I can set in BF537 stamp Linux kernel.
+
+ The test is done by dumping memory from 0x20000000 to 0x20000010 using
+ GDB and gdbproxy:
+
+ (gdb) dump memory u-boot.bin 0x20000000 0x20000010
+ (gdb) shell hexdump -C u-boot.bin
+
+ With an incorrect number of wait clocks, the first 4 bytes will be
+ duplicated by the second 4 bytes. */
+
+ if (bfin_wait_clocks == -1)
+ {
+ urj_cable_t *cable = chain->cable;
+ uint32_t frequency = cable->frequency;
+ const char *name = cable->driver->name;
+
+ if (strcmp (name, "gnICE+") == 0)
+ {
+ if (frequency <= 6000000)
+ bfin_wait_clocks = 5;
+ else if (frequency <= 15000000)
+ bfin_wait_clocks = 12;
+ else /* <= 30MHz */
+ bfin_wait_clocks = 21;
+ }
+ else if (strcmp (name, "gnICE") == 0)
+ bfin_wait_clocks = 3;
+ else if (strcmp (name, "ICE-100B") == 0)
+ {
+ if (frequency <= 5000000)
+ bfin_wait_clocks = 5;
+ else if (frequency <= 10000000)
+ bfin_wait_clocks = 11;
+ else if (frequency <= 17000000)
+ bfin_wait_clocks = 19;
+ else /* <= 25MHz */
+ bfin_wait_clocks = 30;
+ }
+
+ if (bfin_wait_clocks == -1)
+ {
+ bfin_wait_clocks = 30;
+ urj_warning (_("%s: untested cable, set wait_clocks to %d\n"),
+ name, bfin_wait_clocks);
+ }
+ }
+
+ urj_tap_chain_defer_clock (chain, 0, 0, bfin_wait_clocks);
+}
+
+static void
+bfin_part_init (urj_part_t *part)
+{
+ int i;
+
+ if (!part || !part->params)
+ goto error;
+
+ part->params->free = free;
+ part->params->wait_ready = bfin_wait_ready;
+ part->params->data = malloc (sizeof (struct bfin_part_data));
+
+ *BFIN_PART_DATA (part) = bfin_part_data_initializer;
+
+ if (!part->active_instruction)
+ goto error;
+ for (i = 0; i < NUM_SCANS; i++)
+ if (strcmp (part->active_instruction->name, scans[i]) == 0)
+ break;
+
+ if (i == NUM_SCANS)
+ goto error;
+
+ BFIN_PART_SCAN (part) = i;
+ return;
+
+ error:
+ urj_warning (_("Blackfin part is missing instructions\n"));
+}
+
+void _bfin_part_init (void) __attribute__((constructor));
+
+void
+_bfin_part_init (void)
+{
+ /* Keep in sync with data/analog/PARTS */
+ urj_part_init_register ("BF506", bfin_part_init);
+ urj_part_init_register ("BF518", bfin_part_init);
+ urj_part_init_register ("BF526", bfin_part_init);
+ urj_part_init_register ("BF527", bfin_part_init);
+ urj_part_init_register ("BF533", bfin_part_init);
+ urj_part_init_register ("BF534", bfin_part_init);
+ urj_part_init_register ("BF537", bfin_part_init);
+ urj_part_init_register ("BF538", bfin_part_init);
+ urj_part_init_register ("BF548", bfin_part_init);
+ urj_part_init_register ("BF548M", bfin_part_init);
+ urj_part_init_register ("BF561", bfin_part_init);
+ urj_part_init_register ("BF592", bfin_part_init);
+}
Index: src/bfin/bfin-part.c
===================================================================
--- src/bfin/bfin-part.c (revision 2005)
+++ src/bfin/bfin-part.c (working copy)
@@ -1,169 +0,0 @@
-/*
- * Copyright (C) 2008, 2009, 2010 Analog Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- * 02111-1307, USA.
- */
-
-#include <stdint.h>
-#include <assert.h>
-#include <string.h>
-
-#include <urjtag/part.h>
-#include <urjtag/bfin.h>
-#include "bfin-part.h"
-
-/* Wrappers of the helper functions. */
-
-void
-_part_dbgctl_init (urj_part_t *part, uint16_t value)
-{
- EMU_OAB (part)->dbgctl_init (part, value);
-}
-
-uint16_t
-_part_dbgstat_value (urj_part_t *part)
-{
- return EMU_OAB (part)->dbgstat_value (part);
-}
-
-/* Routines to access DBGCTL and DBGSTAT bits. */
-
-#define _PART_DBGCTL_CLEAR_OR_SET_BIT(name) \
- uint16_t \
- _part_dbgctl_bit_clear_or_set_##name (urj_part_t *part, uint16_t dbgctl, int set) \
- { \
- if (set) \
- return dbgctl | EMU_OAB (part)->dbgctl_##name; \
- else \
- return dbgctl & ~EMU_OAB (part)->dbgctl_##name; \
- }
-
-#define _PART_DBGCTL_BIT_IS(name) \
- int \
- _part_dbgctl_is_##name (urj_part_t *part, uint16_t dbgctl) \
- { \
- if (dbgctl & EMU_OAB (part)->dbgctl_##name) \
- return 1; \
- else \
- return 0; \
- }
-
-#define _PART_DBGCTL(name) \
- _PART_DBGCTL_CLEAR_OR_SET_BIT(name) \
- _PART_DBGCTL_BIT_IS(name)
-
-#define _PART_DBGCTL_BIT_IS_MASK(base, sfx) \
- int \
- _part_dbgctl_is_##base##_##sfx (urj_part_t *part, uint16_t dbgctl) \
- { \
- if ((dbgctl & EMU_OAB (part)->dbgctl_##base##_mask) == \
- EMU_OAB (part)->dbgctl_##base##_##sfx) \
- return 1; \
- else \
- return 0; \
- }
-
-#define _PART_DBGCTL_MASK(base, sfx) \
- _PART_DBGCTL_CLEAR_OR_SET_BIT(base##_##sfx) \
- _PART_DBGCTL_BIT_IS_MASK(base, sfx)
-
-_PART_DBGCTL (sram_init)
-_PART_DBGCTL (wakeup)
-_PART_DBGCTL (sysrst)
-_PART_DBGCTL (esstep)
-_PART_DBGCTL_MASK (emudatsz, 32)
-_PART_DBGCTL_MASK (emudatsz, 40)
-_PART_DBGCTL_MASK (emudatsz, 48)
-_PART_DBGCTL (emuirlpsz_2)
-_PART_DBGCTL_MASK (emuirsz, 64)
-_PART_DBGCTL_MASK (emuirsz, 48)
-_PART_DBGCTL_MASK (emuirsz, 32)
-_PART_DBGCTL (empen)
-_PART_DBGCTL (emeen)
-_PART_DBGCTL (emfen)
-_PART_DBGCTL (empwr)
-
-#define _PART_DBGSTAT_BIT_IS(name) \
- int \
- _part_dbgstat_is_##name (urj_part_t *part, uint16_t dbgstat) \
- { \
- if (dbgstat & EMU_OAB (part)->dbgstat_##name) \
- return 1; \
- else \
- return 0; \
- }
-
-#define _PART_DBGSTAT_CLEAR_BIT(name) \
- uint16_t \
- _part_dbgstat_bit_clear_##name (urj_part_t *part, uint16_t dbgstat) \
- { \
- return dbgstat & ~EMU_OAB (part)->dbgstat_##name; \
- }
-
-#define _PART_DBGSTAT_SET_BIT(name) \
- uint16_t \
- _part_dbgstat_bit_set_##name (urj_part_t *part, uint16_t dbgstat) \
- { \
- return dbgstat | EMU_OAB (part)->dbgstat_##name; \
- }
-
-_PART_DBGSTAT_BIT_IS (lpdec1)
-_PART_DBGSTAT_BIT_IS (in_powrgate)
-_PART_DBGSTAT_BIT_IS (core_fault)
-_PART_DBGSTAT_BIT_IS (idle)
-_PART_DBGSTAT_BIT_IS (in_reset)
-_PART_DBGSTAT_BIT_IS (lpdec0)
-_PART_DBGSTAT_BIT_IS (bist_done)
-_PART_DBGSTAT_BIT_IS (emuack)
-_PART_DBGSTAT_BIT_IS (emuready)
-_PART_DBGSTAT_BIT_IS (emudiovf)
-_PART_DBGSTAT_BIT_IS (emudoovf)
-_PART_DBGSTAT_BIT_IS (emudif)
-_PART_DBGSTAT_BIT_IS (emudof)
-
-_PART_DBGSTAT_CLEAR_BIT (emudiovf)
-_PART_DBGSTAT_CLEAR_BIT (emudoovf)
-
-_PART_DBGSTAT_SET_BIT (emudiovf)
-_PART_DBGSTAT_SET_BIT (emudoovf)
-
-int
-_part_dbgctl_dbgstat_in_one_chain (urj_part_t *part)
-{
- return EMU_OAB (part)->dbgctl_dbgstat_in_one_chain;
-}
-
-int
-_part_sticky_in_reset (urj_part_t *part)
-{
- return EMU_OAB (part)->sticky_in_reset;
-}
-
-uint16_t
-_part_dbgstat_emucause_mask (urj_part_t *part)
-{
- return EMU_OAB (part)->dbgstat_emucause_mask;
-}
-
-void _bfin_part_init (void) __attribute__((constructor));
-
-extern void bfin_init (void);
-
-void
-_bfin_part_init (void)
-{
- bfin_init ();
-}
Index: src/bfin/bfin-part.h
===================================================================
--- src/bfin/bfin-part.h (revision 2005)
+++ src/bfin/bfin-part.h (working copy)
@@ -1,88 +0,0 @@
-/* Copyright (C) 2008, 2009, 2010 Analog Devices, Inc.
- *
- * This file is subject to the terms and conditions of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2, or (at your option) any later
- * version. See the file COPYING for more details.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Non-GPL License is also available. Please contact
- * <[email protected]> for more information.
- *
- * Implementation of `Blackfin' target for the GDB proxy server.
- */
-
-
-#ifndef _BLACKFIN_PART_H_
-#define _BLACKFIN_PART_H_
-
-#include <urjtag/part.h>
-
-void _part_dbgctl_init (urj_part_t *, uint16_t);
-uint16_t _part_dbgstat_value (urj_part_t *);
-uint16_t _part_dbgstat_emucause_mask (urj_part_t *);
-
-#define DECLARE__PART_DBGCTL_CLEAR_OR_SET_BIT(name) \
- uint16_t _part_dbgctl_bit_clear_or_set_##name (urj_part_t *, uint16_t, int);
-
-#define DECLARE__PART_DBGCTL_IS(name) \
- extern int _part_dbgctl_is_##name (urj_part_t *, uint16_t);
-
-#define DECLARE__PART_DBGCTL(name) \
- DECLARE__PART_DBGCTL_CLEAR_OR_SET_BIT(name) \
- DECLARE__PART_DBGCTL_IS(name)
-
-DECLARE__PART_DBGCTL (sram_init)
-DECLARE__PART_DBGCTL (wakeup)
-DECLARE__PART_DBGCTL (sysrst)
-DECLARE__PART_DBGCTL (esstep)
-DECLARE__PART_DBGCTL (emudatsz_32)
-DECLARE__PART_DBGCTL (emudatsz_40)
-DECLARE__PART_DBGCTL (emudatsz_48)
-DECLARE__PART_DBGCTL (emuirlpsz_2)
-DECLARE__PART_DBGCTL (emuirsz_64)
-DECLARE__PART_DBGCTL (emuirsz_48)
-DECLARE__PART_DBGCTL (emuirsz_32)
-DECLARE__PART_DBGCTL (empen)
-DECLARE__PART_DBGCTL (emeen)
-DECLARE__PART_DBGCTL (emfen)
-DECLARE__PART_DBGCTL (empwr)
-
-#define DECLARE__PART_DBGSTAT_BIT_IS(name) \
- int _part_dbgstat_is_##name (urj_part_t *, uint16_t);
-
-#define DECLARE__PART_DBGSTAT_CLEAR_BIT(name) \
- uint16_t _part_dbgstat_bit_clear_##name (urj_part_t *, uint16_t);
-
-#define DECLARE__PART_DBGSTAT_SET_BIT(name) \
- uint16_t _part_dbgstat_bit_set_##name (urj_part_t *, uint16_t);
-
-DECLARE__PART_DBGSTAT_BIT_IS (lpdec1)
-DECLARE__PART_DBGSTAT_BIT_IS (in_powrgate)
-DECLARE__PART_DBGSTAT_BIT_IS (core_fault)
-DECLARE__PART_DBGSTAT_BIT_IS (idle)
-DECLARE__PART_DBGSTAT_BIT_IS (in_reset)
-DECLARE__PART_DBGSTAT_BIT_IS (lpdec0)
-DECLARE__PART_DBGSTAT_BIT_IS (bist_done)
-DECLARE__PART_DBGSTAT_BIT_IS (emuack)
-DECLARE__PART_DBGSTAT_BIT_IS (emuready)
-DECLARE__PART_DBGSTAT_BIT_IS (emudiovf)
-DECLARE__PART_DBGSTAT_BIT_IS (emudoovf)
-DECLARE__PART_DBGSTAT_BIT_IS (emudif)
-DECLARE__PART_DBGSTAT_BIT_IS (emudof)
-
-DECLARE__PART_DBGSTAT_CLEAR_BIT (emudiovf)
-DECLARE__PART_DBGSTAT_CLEAR_BIT (emudoovf)
-
-DECLARE__PART_DBGSTAT_SET_BIT (emudiovf)
-DECLARE__PART_DBGSTAT_SET_BIT (emudoovf)
-
-int _part_sticky_in_reset (urj_part_t *);
-int _part_dbgctl_dbgstat_in_one_chain (urj_part_t *);
-
-
-#endif /* _BLACKFIN_PART_H_ */
Index: src/bfin/Makefile.am
===================================================================
--- src/bfin/Makefile.am (revision 2005)
+++ src/bfin/Makefile.am (working copy)
@@ -27,9 +27,6 @@ noinst_LTLIBRARIES = libbfin.la
libbfin_la_SOURCES = \
insn-gen.c \
- bfin.c \
- bfin-part.c \
- bfin-part.h \
- bfin-part-bfin.c
+ bfin.c
AM_CFLAGS = $(WARNINGCFLAGS)
------------------------------------------------------------------------------
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