I browsed a source codes of urjtag.-0.10 and would like to ask any experts 2 questions:
1. File ejtag_dma.c in \urjtag-0.10\src\bus directory uses 17 bit ( defines it as DmaAcc ) of EJTAG_CONTROL register. But EJTAG specification 2.6 or 3.1 say about that 17th bit "Must be written as zeros; return zeros on reads." How was found out it is nescessary to use that bit? 2. File ejtag.c in \urjtag-0.10\src\bus directory if EJTAG_VER == EJTAG_20 writes something to Debug Control Register Address, 0xFF300000 Why is that nescessary? Is there a description why is that needed? Thanks ------------------------------------------------------------------------------ Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ _______________________________________________ UrJTAG-development mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/urjtag-development
