Does it work for you if you revert this commit? http://sourceforge.net/p/urjtag/git/ci/98bf7f38695dea2dbd31dec9e47e769575f8ce6e/
On Thu, Aug 28, 2014 at 3:05 AM, Dan Horák <[email protected]> wrote: > Add BF_ prefix to bfin register definitions because they conflict with > register > names from /usr/include/sys/ucontext.h on ARM platforms. > > platform is armv7hl-redhat-linux-gnu (Fedora 21) > > ... > In file included from /usr/include/signal.h:352:0, > from /usr/include/sys/wait.h:29, > from cmd_bfin.c:30: > ../../include/urjtag/bfin.h:40:5: error: redeclaration of enumerator 'REG_R0' > REG_R0 = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, > ^ > /usr/include/sys/ucontext.h:41:3: note: previous definition of 'REG_R0' was > here > REG_R0 = 0, > ^ > ../../include/urjtag/bfin.h:40:23: error: redeclaration of enumerator 'REG_R1' > REG_R0 = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, > ^ > /usr/include/sys/ucontext.h:43:3: note: previous definition of 'REG_R1' was > here > REG_R1 = 1, > ^ > ... > --- > urjtag/include/urjtag/bfin.h | 44 ++++++++++---------- > urjtag/src/bfin/bfin.c | 96 > ++++++++++++++++++++++---------------------- > 2 files changed, 70 insertions(+), 70 deletions(-) > > diff --git a/urjtag/include/urjtag/bfin.h b/urjtag/include/urjtag/bfin.h > index d642e19..cfbafe0 100644 > --- a/urjtag/include/urjtag/bfin.h > +++ b/urjtag/include/urjtag/bfin.h > @@ -27,35 +27,35 @@ > > > /* High-Nibble: group code, low nibble: register code. */ > -#define T_REG_R 0x00 > -#define T_REG_P 0x10 > -#define T_REG_I 0x20 > -#define T_REG_B 0x30 > -#define T_REG_L 0x34 > -#define T_REG_M 0x24 > -#define T_REG_A 0x40 > +#define BF_T_REG_R 0x00 > +#define BF_T_REG_P 0x10 > +#define BF_T_REG_I 0x20 > +#define BF_T_REG_B 0x30 > +#define BF_T_REG_L 0x34 > +#define BF_T_REG_M 0x24 > +#define BF_T_REG_A 0x40 > > enum core_regnum > { > - REG_R0 = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, > - REG_P0 = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, > - REG_I0 = T_REG_I, REG_I1, REG_I2, REG_I3, > - REG_M0 = T_REG_M, REG_M1, REG_M2, REG_M3, > - REG_B0 = T_REG_B, REG_B1, REG_B2, REG_B3, > - REG_L0 = T_REG_L, REG_L1, REG_L2, REG_L3, > - REG_A0x = T_REG_A, REG_A0w, REG_A1x, REG_A1w, > - REG_ASTAT = 0x46, > - REG_RETS = 0x47, > - REG_LC0 = 0x60, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, > - REG_CYCLES, REG_CYCLES2, > - REG_USP = 0x70, REG_SEQSTAT, REG_SYSCFG, > - REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, > + BF_REG_R0 = BF_T_REG_R, BF_REG_R1, BF_REG_R2, BF_REG_R3, BF_REG_R4, > BF_REG_R5, BF_REG_R6, BF_REG_R7, > + BF_REG_P0 = BF_T_REG_P, BF_REG_P1, BF_REG_P2, BF_REG_P3, BF_REG_P4, > BF_REG_P5, BF_REG_SP, BF_REG_FP, > + BF_REG_I0 = BF_T_REG_I, BF_REG_I1, BF_REG_I2, BF_REG_I3, > + BF_REG_M0 = BF_T_REG_M, BF_REG_M1, BF_REG_M2, BF_REG_M3, > + BF_REG_B0 = BF_T_REG_B, BF_REG_B1, BF_REG_B2, BF_REG_B3, > + BF_REG_L0 = BF_T_REG_L, BF_REG_L1, BF_REG_L2, BF_REG_L3, > + BF_REG_A0x = BF_T_REG_A, BF_REG_A0w, BF_REG_A1x, BF_REG_A1w, > + BF_REG_ASTAT = 0x46, > + BF_REG_RETS = 0x47, > + BF_REG_LC0 = 0x60, BF_REG_LT0, BF_REG_LB0, BF_REG_LC1, BF_REG_LT1, > BF_REG_LB1, > + BF_REG_CYCLES, BF_REG_CYCLES2, > + BF_REG_USP = 0x70, BF_REG_SEQSTAT, BF_REG_SYSCFG, > + BF_REG_RETI, BF_REG_RETX, BF_REG_RETN, BF_REG_RETE, BF_REG_EMUDAT, > }; > > #define CLASS_MASK 0xf0 > #define GROUP(x) (((x) & CLASS_MASK) >> 4) > -#define DREG_P(x) (((x) & CLASS_MASK) == T_REG_R) > -#define PREG_P(x) (((x) & CLASS_MASK) == T_REG_P) > +#define BF_DREG_P(x) (((x) & CLASS_MASK) == BF_T_REG_R) > +#define BF_PREG_P(x) (((x) & CLASS_MASK) == BF_T_REG_P) > > > #define DTEST_COMMAND 0xffe00300 > diff --git a/urjtag/src/bfin/bfin.c b/urjtag/src/bfin/bfin.c > index 8205a1e..183cbb0 100644 > --- a/urjtag/src/bfin/bfin.c > +++ b/urjtag/src/bfin/bfin.c > @@ -819,18 +819,18 @@ part_register_get (urj_chain_t *chain, int n, enum > core_regnum reg) > urj_tap_register_t *r; > uint32_t r0 = 0; > > - if (DREG_P (reg) || PREG_P (reg)) > - part_emuir_set (chain, n, gen_move (REG_EMUDAT, reg), > URJ_CHAIN_EXITMODE_IDLE); > + if (BF_DREG_P (reg) || BF_PREG_P (reg)) > + part_emuir_set (chain, n, gen_move (BF_REG_EMUDAT, reg), > URJ_CHAIN_EXITMODE_IDLE); > else > { > - r0 = part_register_get (chain, n, REG_R0); > + r0 = part_register_get (chain, n, BF_REG_R0); > > part_scan_select (chain, n, DBGCTL_SCAN); > part_dbgctl_bit_set_emuirlpsz_2 (chain, n); > urj_tap_chain_shift_data_registers_mode (chain, 0, 1, > URJ_CHAIN_EXITMODE_UPDATE); > > - part_emuir_set_2 (chain, n, gen_move (REG_R0, reg), > - gen_move (REG_EMUDAT, REG_R0), > URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set_2 (chain, n, gen_move (BF_REG_R0, reg), > + gen_move (BF_REG_EMUDAT, BF_REG_R0), > URJ_CHAIN_EXITMODE_IDLE); > > part_scan_select (chain, n, DBGCTL_SCAN); > part_dbgctl_bit_clear_emuirlpsz_2 (chain, n); > @@ -842,8 +842,8 @@ part_register_get (urj_chain_t *chain, int n, enum > core_regnum reg) > part = chain->parts->parts[n]; > r = part->active_instruction->data_register->out; > > - if (!DREG_P (reg) && !PREG_P (reg)) > - part_register_set (chain, n, REG_R0, r0); > + if (!BF_DREG_P (reg) && !BF_PREG_P (reg)) > + part_register_set (chain, n, BF_REG_R0, r0); > > return emudat_value (r); > } > @@ -855,8 +855,8 @@ part_register_set (urj_chain_t *chain, int n, enum > core_regnum reg, uint32_t val > urj_tap_register_t *r; > uint32_t r0 = 0; > > - if (!DREG_P (reg) && !PREG_P (reg)) > - r0 = part_register_get (chain, n, REG_R0); > + if (!BF_DREG_P (reg) && !BF_PREG_P (reg)) > + r0 = part_register_get (chain, n, BF_REG_R0); > > part_scan_select (chain, n, EMUDAT_SCAN); > > @@ -867,47 +867,47 @@ part_register_set (urj_chain_t *chain, int n, enum > core_regnum reg, uint32_t val > > urj_tap_chain_shift_data_registers_mode (chain, 0, 1, > URJ_CHAIN_EXITMODE_UPDATE); > > - if (DREG_P (reg) || PREG_P (reg)) > - part_emuir_set (chain, n, gen_move (reg, REG_EMUDAT), > URJ_CHAIN_EXITMODE_IDLE); > + if (BF_DREG_P (reg) || BF_PREG_P (reg)) > + part_emuir_set (chain, n, gen_move (reg, BF_REG_EMUDAT), > URJ_CHAIN_EXITMODE_IDLE); > else > { > part_scan_select (chain, n, DBGCTL_SCAN); > part_dbgctl_bit_set_emuirlpsz_2 (chain, n); > urj_tap_chain_shift_data_registers_mode (chain, 0, 1, > URJ_CHAIN_EXITMODE_UPDATE); > > - part_emuir_set_2 (chain, n, gen_move (REG_R0, REG_EMUDAT), > - gen_move (reg, REG_R0), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set_2 (chain, n, gen_move (BF_REG_R0, BF_REG_EMUDAT), > + gen_move (reg, BF_REG_R0), > URJ_CHAIN_EXITMODE_IDLE); > > part_scan_select (chain, n, DBGCTL_SCAN); > part_dbgctl_bit_clear_emuirlpsz_2 (chain, n); > urj_tap_chain_shift_data_registers_mode (chain, 0, 1, > URJ_CHAIN_EXITMODE_UPDATE); > > - part_register_set (chain, n, REG_R0, r0); > + part_register_set (chain, n, BF_REG_R0, r0); > } > } > > uint32_t > part_get_r0 (urj_chain_t *chain, int n) > { > - return part_register_get (chain, n, REG_R0); > + return part_register_get (chain, n, BF_REG_R0); > } > > uint32_t > part_get_p0 (urj_chain_t *chain, int n) > { > - return part_register_get (chain, n, REG_P0); > + return part_register_get (chain, n, BF_REG_P0); > } > > void > part_set_r0 (urj_chain_t *chain, int n, uint32_t value) > { > - part_register_set (chain, n, REG_R0, value); > + part_register_set (chain, n, BF_REG_R0, value); > } > > void > part_set_p0 (urj_chain_t *chain, int n, uint32_t value) > { > - part_register_set (chain, n, REG_P0, value); > + part_register_set (chain, n, BF_REG_P0, value); > } > > void > @@ -1001,7 +1001,7 @@ chain_system_reset (urj_chain_t *chain) > /* Write 0x7 to SWRST to start system reset. */ > part_set_p0 (chain, chain->main_part, SWRST); > part_set_r0 (chain, chain->main_part, 0x7); > - part_emuir_set (chain, chain->main_part, gen_store16_offset (REG_P0, 0, > REG_R0), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, chain->main_part, gen_store16_offset (BF_REG_P0, > 0, BF_REG_R0), URJ_CHAIN_EXITMODE_IDLE); > > /* > * Delay at least 10 SCLKs instead of doing an SSYNC insn. > @@ -1014,7 +1014,7 @@ chain_system_reset (urj_chain_t *chain) > > /* Write 0x0 to SWRST to stop system reset. */ > part_set_r0 (chain, chain->main_part, 0); > - part_emuir_set (chain, chain->main_part, gen_store16_offset (REG_P0, 0, > REG_R0), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, chain->main_part, gen_store16_offset (BF_REG_P0, > 0, BF_REG_R0), URJ_CHAIN_EXITMODE_IDLE); > > /* Delay at least 1 SCLK; see comment above for more info. */ > usleep (100); > @@ -1064,14 +1064,14 @@ part_emupc_reset (urj_chain_t *chain, int n, uint32_t > new_pc) > urj_part_t *part = chain->parts->parts[n]; > uint32_t p0; > > - p0 = part_register_get (chain, n, REG_P0); > + p0 = part_register_get (chain, n, BF_REG_P0); > > BFIN_PART_EMUPC (part) = new_pc; > > - part_register_set (chain, n, REG_P0, new_pc); > - part_emuir_set (chain, n, gen_jump_reg (REG_P0), > URJ_CHAIN_EXITMODE_IDLE); > + part_register_set (chain, n, BF_REG_P0, new_pc); > + part_emuir_set (chain, n, gen_jump_reg (BF_REG_P0), > URJ_CHAIN_EXITMODE_IDLE); > > - part_register_set (chain, n, REG_P0, p0); > + part_register_set (chain, n, BF_REG_P0, p0); > } > > uint32_t > @@ -1089,22 +1089,22 @@ part_mmr_read_clobber_r0 (urj_chain_t *chain, int n, > int32_t offset, int size) > > if (size == 2) > part_emuir_set_2 (chain, n, > - gen_load16z (REG_R0, REG_P0), > - gen_move (REG_EMUDAT, REG_R0), > + gen_load16z (BF_REG_R0, BF_REG_P0), > + gen_move (BF_REG_EMUDAT, BF_REG_R0), > URJ_CHAIN_EXITMODE_UPDATE); > else > part_emuir_set_2 (chain, n, > - gen_load32 (REG_R0, REG_P0), > - gen_move (REG_EMUDAT, REG_R0), > + gen_load32 (BF_REG_R0, BF_REG_P0), > + gen_move (BF_REG_EMUDAT, BF_REG_R0), > URJ_CHAIN_EXITMODE_UPDATE); > } > else > { > if (size == 2) > - part_emuir_set (chain, n, gen_load16z_offset (REG_R0, REG_P0, > offset), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, n, gen_load16z_offset (BF_REG_R0, > BF_REG_P0, offset), URJ_CHAIN_EXITMODE_IDLE); > else > - part_emuir_set (chain, n, gen_load32_offset (REG_R0, REG_P0, > offset), URJ_CHAIN_EXITMODE_IDLE); > - part_emuir_set (chain, n, gen_move (REG_EMUDAT, REG_R0), > URJ_CHAIN_EXITMODE_UPDATE); > + part_emuir_set (chain, n, gen_load32_offset (BF_REG_R0, > BF_REG_P0, offset), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, n, gen_move (BF_REG_EMUDAT, BF_REG_R0), > URJ_CHAIN_EXITMODE_UPDATE); > } > value = part_emudat_get (chain, n, URJ_CHAIN_EXITMODE_IDLE); > > @@ -1124,14 +1124,14 @@ part_mmr_read (urj_chain_t *chain, int n, uint32_t > addr, int size) > uint32_t p0, r0; > uint32_t value; > > - p0 = part_register_get (chain, n, REG_P0); > - r0 = part_register_get (chain, n, REG_R0); > + p0 = part_register_get (chain, n, BF_REG_P0); > + r0 = part_register_get (chain, n, BF_REG_R0); > > - part_register_set (chain, n, REG_P0, addr); > + part_register_set (chain, n, BF_REG_P0, addr); > value = part_mmr_read_clobber_r0 (chain, n, 0, size); > > - part_register_set (chain, n, REG_P0, p0); > - part_register_set (chain, n, REG_R0, r0); > + part_register_set (chain, n, BF_REG_P0, p0); > + part_register_set (chain, n, BF_REG_R0, r0); > > return value; > } > @@ -1151,22 +1151,22 @@ part_mmr_write_clobber_r0 (urj_chain_t *chain, int n, > int32_t offset, uint32_t d > > if (size == 2) > part_emuir_set_2 (chain, n, > - gen_move (REG_R0, REG_EMUDAT), > - gen_store16 (REG_P0, REG_R0), > + gen_move (BF_REG_R0, BF_REG_EMUDAT), > + gen_store16 (BF_REG_P0, BF_REG_R0), > URJ_CHAIN_EXITMODE_IDLE); > else > part_emuir_set_2 (chain, n, > - gen_move (REG_R0, REG_EMUDAT), > - gen_store32 (REG_P0, REG_R0), > + gen_move (BF_REG_R0, BF_REG_EMUDAT), > + gen_store32 (BF_REG_P0, BF_REG_R0), > URJ_CHAIN_EXITMODE_IDLE); > } > else > { > - part_emuir_set (chain, n, gen_move (REG_R0, REG_EMUDAT), > URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, n, gen_move (BF_REG_R0, BF_REG_EMUDAT), > URJ_CHAIN_EXITMODE_IDLE); > if (size == 2) > - part_emuir_set (chain, n, gen_store16_offset (REG_P0, offset, > REG_R0), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, n, gen_store16_offset (BF_REG_P0, offset, > BF_REG_R0), URJ_CHAIN_EXITMODE_IDLE); > else > - part_emuir_set (chain, n, gen_store32_offset (REG_P0, offset, > REG_R0), URJ_CHAIN_EXITMODE_IDLE); > + part_emuir_set (chain, n, gen_store32_offset (BF_REG_P0, offset, > BF_REG_R0), URJ_CHAIN_EXITMODE_IDLE); > } > > if (offset == 0) > @@ -1182,14 +1182,14 @@ part_mmr_write (urj_chain_t *chain, int n, uint32_t > addr, uint32_t data, int siz > { > uint32_t p0, r0; > > - p0 = part_register_get (chain, n, REG_P0); > - r0 = part_register_get (chain, n, REG_R0); > + p0 = part_register_get (chain, n, BF_REG_P0); > + r0 = part_register_get (chain, n, BF_REG_R0); > > - part_register_set (chain, n, REG_P0, addr); > + part_register_set (chain, n, BF_REG_P0, addr); > part_mmr_write_clobber_r0 (chain, n, 0, data, size); > > - part_register_set (chain, n, REG_P0, p0); > - part_register_set (chain, n, REG_R0, r0); > + part_register_set (chain, n, BF_REG_P0, p0); > + part_register_set (chain, n, BF_REG_R0, r0); > } > > struct bfin_part_data bfin_part_data_initializer = > -- > 1.9.3 > > > ------------------------------------------------------------------------------ > Slashdot TV. > Video for Nerds. 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