On Wed, Dec 04, 2019 at 09:19:58AM +0100, Jiri Gaisler wrote: > Small patch to allow programming of Pender Electronics XC6SLX75 development > board. >
> >From 4a7579291ef3db6405dfbf9af6e49ab448b20886 Mon Sep 17 00:00:00 2001 > From: Jiri Gaisler <[email protected]> > Date: Tue, 3 Dec 2019 23:49:10 +0100 > Subject: [PATCH 1/1] Define stepping 0 for Xilinx xc6slx75 FPGA > > --- > urjtag/data/xilinx/xc6slx75/STEPPINGS | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/urjtag/data/xilinx/xc6slx75/STEPPINGS > b/urjtag/data/xilinx/xc6slx75/STEPPINGS > index 288f7093..00b93085 100644 > --- a/urjtag/data/xilinx/xc6slx75/STEPPINGS > +++ b/urjtag/data/xilinx/xc6slx75/STEPPINGS > @@ -1 +1,2 @@ > +0000 xc6slx75 0 > 0001 xc6slx75 1 Applied. Thanks for the contribution. Groeten Geert Stappers -- Leven en laten leven _______________________________________________ UrJTAG-development mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/urjtag-development
