Hi all,
I am using USRP B200mini/B205 to develop a custom DSP. For that purpose, I am
trying to find an insertion point in the Ettus FPGA code.
I started with modifying the code in b205.v by tying RX and TX to a constant
value and expecting to see the same value when running SDR. The code compiles
and I am able to generate the FPGA bit file, but when I try to run SDR, I get
the following error:
Detected Device: B200mini
-- Loading FPGA image: /usr/local/share/uhd/images/usrp_b200mini_fpga.bin...
done
-- Operating over USB 3.
-- Initialize CODEC control...
-- Initialize Radio control...
-- Performing register loopback test... pass
-- Performing CODEC loopback test... fail
Traceback (most recent call last):
File "/home/nev/AuesLayer1Stuff/importantGRC/top_block.py", line 292, in
<module>
main()
File "/home/nev/AuesLayer1Stuff/importantGRC/top_block.py", line 286, in main
tb = top_block_cls()
File "/home/nev/AuesLayer1Stuff/importantGRC/top_block.py", line 199, in
__init__
channels=range(1),
File "/usr/local/lib/python2.7/dist-packages/gnuradio/uhd/__init__.py", line
122, in constructor_interceptor
return old_constructor(*args)
File "/usr/local/lib/python2.7/dist-packages/gnuradio/uhd/uhd_swig.py", line
2681, in make
return _uhd_swig.usrp_source_make(*args)
RuntimeError: RuntimeError: CODEC loopback test failed.
How can I bypass this error? And where should I look in the Ettus FPGA code if
I want to modify captured data.
--
Thanks and Regards
Shoor
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