Hello, On E310 with environment correctly set up, run: uhd_image_downloader (in the instructions, it is assumed that you are not connected to Internet, so an error is expected.
Your output should be: UHD_IMAGES_DIR environment variable is set. Default install location: /home/root/newinstall/usr/share/uhd/images Images destination: /home/root/newinstall/usr/share/uhd/images Downloading images from: *http://files.ettus.com/binaries/images/uhd-images_4.0.0.rfnoc-devel-xxx-xxxxxxxxx.zip <http://files.ettus.com/binaries/images/uhd-images_4.0.0.rfnoc-devel-xxx-xxxxxxxxx.zip>* Downloading images to: /tmp/tmpS1uIFt/4.0.0.rfnoc-devel-xxx-xxxxxxxxx.zip Downloader raised an unhandled exception: ('Connection aborted.', gaierror(-2, 'Name or service not known')) You can run this again with the '--verbose' flag to see more information If the problem persists, please email the output to: [email protected] You should then run: wget http://files.ettus.com/binaries/images/uhd-images_4.0.0.rfnoc-devel-xxx-xxxxxxxxx.zip Hope this helps. Thanks On Thu, Jul 5, 2018 at 9:13 AM, Mathieu Vinette <[email protected]> wrote: > *Thanks again John,* > > > > *Here’s my new challenge.* > > > > *After doing the image download process, these are the images I get.* > > > > root@ettus-e3xx-sg3:~/newinstall/usr/share/uhd/images# ls > > bit > usrp_e310_fpga_sg3.rpt usrp_n300_fpga_HG.rpt > usrp_n310_fpga_XG.bit.md5 > > inventory.json > usrp_e3xx_fpga_idle.bin usrp_n300_fpga_WX.bit > usrp_n310_fpga_XG.dts > > octoclock_bootloader.hex usrp_e3xx_fpga_idle.bit > usrp_n300_fpga_WX.bit.md5 usrp_n310_fpga_XG.dts.md5 > > octoclock_r4_fw.hex usrp_e3xx_fpga_idle.rpt > usrp_n300_fpga_WX.dts usrp_n310_fpga_XG.rpt > > usrp1_fpga.rbf > usrp_e3xx_fpga_idle_sg3.bin usrp_n300_fpga_WX.dts.md5 > usrp_x300_fpga_HG.bin > > usrp1_fpga_4rx.rbf usrp_e3xx_fpga_idle_sg3.bit > usrp_n300_fpga_WX.rpt usrp_x300_fpga_HG.bit > > usrp1_fw.ihx > usrp_e3xx_fpga_idle_sg3.rpt usrp_n300_fpga_XG.bit > usrp_x300_fpga_HG.lvbitx > > usrp2_fpga.bin usrp_n200_fw.bin > usrp_n300_fpga_XG.bit.md5 > usrp_x300_fpga_HG.rpt > > usrp2_fw.bin > usrp_n200_r2_fpga.bin usrp_n300_fpga_XG.dts > usrp_x300_fpga_XG.bin > > usrp_b100_fpga.bin usrp_n200_r3_fpga.bin > usrp_n300_fpga_XG.dts.md5 usrp_x300_fpga_XG.bit > > usrp_b100_fpga_2rx.bin usrp_n200_r4_fpga.bin > usrp_n300_fpga_XG.rpt usrp_x300_fpga_XG.lvbitx > > usrp_b100_fw.ihx usrp_n210_fw.bin > usrp_n310_fpga_HG.bit usrp_x300_fpga_XG.rpt > > usrp_b200_fpga.bin usrp_n210_r2_fpga.bin > usrp_n310_fpga_HG.bit.md5 usrp_x310_fpga_HG.bin > > usrp_b200_fw.hex usrp_n210_r3_fpga.bin > usrp_n310_fpga_HG.dts usrp_x310_fpga_HG.bit > > usrp_b200mini_fpga.bin usrp_n210_r4_fpga.bin > usrp_n310_fpga_HG.dts.md5 usrp_x310_fpga_HG.lvbitx > > usrp_b205mini_fpga.bin usrp_n230_fpga.bin > usrp_n310_fpga_HG.rpt usrp_x310_fpga_HG.rpt > > usrp_b210_fpga.bin usrp_n230_fpga.bit > usrp_n310_fpga_WX.bit usrp_x310_fpga_XG.bin > > usrp_e310_fpga.bin usrp_n230_fpga.rpt > usrp_n310_fpga_WX.bit.md5 usrp_x310_fpga_XG.bit > > usrp_e310_fpga.bit usrp_n300_fpga_HG.bit > usrp_n310_fpga_WX.dts usrp_x310_fpga_XG.lvbitx > > usrp_e310_fpga.rpt usrp_n300_fpga_HG.bit.md5 > usrp_n310_fpga_WX.dts.md5 usrp_x310_fpga_XG.rpt > > usrp_e310_fpga_sg3.bin usrp_n300_fpga_HG.dts > usrp_n310_fpga_WX.rpt winusb_driver > > usrp_e310_fpga_sg3.bit usrp_n300_fpga_HG.dts.md5 > usrp_n310_fpga_XG.bit > > root@ettus-e3xx-sg3:~/newinstall# > > > > > > *There are no RFNOC images in the list, so what I did is download it and > copy it to the proper dir.* > > > > > > matt@Matt-Linux:~/e300/src$ wget http://files.ettus.com/ > binaries/images/uhd-images_4.0.0.rfnoc-devel-238-g39a41476.zip > > matt@Matt-Linux:~/e300/src$ unzip uhd-images_4.0.0.rfnoc-devel- > 238-g39a41476.zip > > matt@Matt-Linux:~/e300/usr/share/uhd/images$ cp -R > ~/e300/src/uhd-images_4.0.0.rfnoc-devel-238-g39a41476/share/uhd/images/*RFNOC* > . > > matt@Matt-Linux:~/e300/usr/share/uhd/images$ ls > > bit > usrp_e3xx_fpga_idle.bin usrp_n300_fpga_WX.dts.md5 > usrp_x300_fpga_HG.rpt > > inventory.json > usrp_e3xx_fpga_idle.bit usrp_n300_fpga_WX.rpt > usrp_x300_fpga_RFNOC_HG.bit > > octoclock_bootloader.hex > usrp_e3xx_fpga_idle.rpt usrp_n300_fpga_XG.bit > usrp_x300_fpga_RFNOC_HG.lvbitx > > octoclock_r4_fw.hex > usrp_e3xx_fpga_idle_sg3.bin usrp_n300_fpga_XG.bit.md5 > usrp_x300_fpga_RFNOC_XG.bit > > usrp1_fpga_4rx.rbf > usrp_e3xx_fpga_idle_sg3.bit usrp_n300_fpga_XG.dts > usrp_x300_fpga_RFNOC_XG.lvbitx > > usrp1_fpga.rbf > usrp_e3xx_fpga_idle_sg3.rpt usrp_n300_fpga_XG.dts.md5 > usrp_x300_fpga_XG.bin > > usrp1_fw.ihx > usrp_n200_fw.bin usrp_n300_fpga_XG.rpt > usrp_x300_fpga_XG.bit > > usrp2_fpga.bin > usrp_n200_r2_fpga.bin usrp_n310_fpga_HG.bit > usrp_x300_fpga_XG.lvbitx > > usrp2_fw.bin > usrp_n200_r3_fpga.bin usrp_n310_fpga_HG.bit.md5 > usrp_x300_fpga_XG.rpt > > usrp_b100_fpga_2rx.bin > usrp_n200_r4_fpga.bin usrp_n310_fpga_HG.dts > usrp_x310_fpga_HG.bin > > usrp_b100_fpga.bin > usrp_n210_fw.bin usrp_n310_fpga_HG.dts.md5 > usrp_x310_fpga_HG.bit > > usrp_b100_fw.ihx > usrp_n210_r2_fpga.bin usrp_n310_fpga_HG.rpt > usrp_x310_fpga_HG.lvbitx > > usrp_b200_fpga.bin > usrp_n210_r3_fpga.bin usrp_n310_fpga_WX.bit > usrp_x310_fpga_HG.rpt > > usrp_b200_fw.hex > usrp_n210_r4_fpga.bin usrp_n310_fpga_WX.bit.md5 > usrp_x310_fpga_RFNOC_HG.bit > > usrp_b200mini_fpga.bin > usrp_n230_fpga.bin usrp_n310_fpga_WX.dts > usrp_x310_fpga_RFNOC_HG.lvbitx > > usrp_b205mini_fpga.bin > usrp_n230_fpga.bit usrp_n310_fpga_WX.dts.md5 > usrp_x310_fpga_RFNOC_XG.bit > > usrp_b210_fpga.bin > usrp_n230_fpga.rpt usrp_n310_fpga_WX.rpt > usrp_x310_fpga_RFNOC_XG.lvbitx > > usrp_e310_fpga.bin > usrp_n300_fpga_HG.bit usrp_n310_fpga_XG.bit > usrp_x310_fpga_XG.bin > > usrp_e310_fpga.bit > usrp_n300_fpga_HG.bit.md5 usrp_n310_fpga_XG.bit.md5 > usrp_x310_fpga_XG.bit > > usrp_e310_fpga_RFNOC.bit > usrp_n300_fpga_HG.dts usrp_n310_fpga_XG.dts > usrp_x310_fpga_XG.lvbitx > > usrp_e310_fpga_RFNOC_sg3.bit usrp_n300_fpga_HG.dts.md5 > usrp_n310_fpga_XG.dts.md5 usrp_x310_fpga_XG.rpt > > usrp_e310_fpga.rpt > usrp_n300_fpga_HG.rpt usrp_n310_fpga_XG.rpt > winusb_driver > > usrp_e310_fpga_sg3.bin > usrp_n300_fpga_WX.bit usrp_x300_fpga_HG.bin > > usrp_e310_fpga_sg3.bit > usrp_n300_fpga_WX.bit.md5 usrp_x300_fpga_HG.bit > > usrp_e310_fpga_sg3.rpt > usrp_n300_fpga_WX.dts usrp_x300_fpga_HG.lvbitx > > matt@Matt-Linux:~/e300/usr/share/uhd/images$ > > > > *Now that the RFNOC images are in the images dir, I go back to the e310, > made sure that the environment was still set properly, and executed the > uhd_usrp_probe specifying the FPGA image to be loaded. Here’s what I get.* > > > > root@ettus-e3xx-sg3:~# uhd_usrp_probe --args='fpga=/home/root/ > newinstall/usr/share/uhd/images/usrp_e310_fpga_RFNOC_sg3.bit' > > [INFO] [UHD] linux; GNU C++ version 4.9.2; Boost_105700; > UHD_4.0.0.rfnoc-devel-702-geec24d7b > > [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/ > share/uhd/images/usrp_e310_fpga_RFNOC_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [INFO] [E300] Initializing core control (global registers)... > > > > [INFO] [E300] Performing register loopback test... > > [INFO] [E300] Register loopback test passed > > [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000000) > > [ERROR] [0/Radio_0] Major compat number mismatch for noc_shell: Expecting > 2, got 195936478. > > Error: RuntimeError: FPGA component `noc_shell' is revision 195936478 and > UHD supports revision 2. Please either upgrade UHD (recommended) or > downgrade the FPGA image. > > root@ettus-e3xx-sg3:~# > > > > > > *I then repeated the process with the RFNOC image from different packages > with the same results. Here are the packages I tried.* > > > > http://files.ettus.com/binaries/images/uhd-images_4. > 0.0.rfnoc-devel-238-g39a41476.zip > > http://files.ettus.com/binaries/images/uhd-images_4. > 0.0.rfnoc-devel-209-gddd6608a.zip > > http://files.ettus.com/binaries/images/uhd-images_4. > 0.0.rfnoc-devel-0-83150fdd.zip > > > > > > *So now, how do I get passed this compatibility mismatch?* > > > > *Thanks* > > *Matt* > > > > > > *From:* John Medrano <[email protected]> > *Sent:* Wednesday, July 04, 2018 3:50 PM > *To:* Mathieu Vinette <[email protected]> > *Cc:* [email protected] > > *Subject:* Re: [USRP-users] Building RFNOC UHD on E310 > > > > Can you try to specify image on command line. > > > > Uhd_usrp_probe --args "fpga=______.bit" > > > > Specify rfnoc E310 image. > > > > If I remember correctly I had to always specify image. > > > > Good luck > > > > On Wed, Jul 4, 2018, 1:21 PM Mathieu Vinette <[email protected]> wrote: > > Thanks John for the quick reply. You’re right, my environment must have > been wrong. After issuing the source ./setup_env.sh command thing got a > little further but this time there’s a few errors at the end after it > loaded the FPGA image. Here’s the capture. I’ve included the which > uhd_usrp_prob to confirm that the environment is setup properly. > > > > root@ettus-e3xx-sg3:~/newinstall# which uhd_usrp_probe > > /home/root/newinstall/usr/bin/uhd_usrp_probe > > root@ettus-e3xx-sg3:~/newinstall# > > root@ettus-e3xx-sg3:~/newinstall# > > root@ettus-e3xx-sg3:~/newinstall# > > root@ettus-e3xx-sg3:~/newinstall# uhd_usrp_probe > > [INFO] [UHD] linux; GNU C++ version 4.9.2; Boost_105700; > UHD_4.0.0.rfnoc-devel-702-geec24d7b > > [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/ > share/uhd/images/usrp_e310_fpga_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [INFO] [E300] Initializing core control (global registers)... > > > > [INFO] [E300] Performing register loopback test... > > [INFO] [E300] Register loopback test passed > > [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000000) > > [INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000) > > [INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000002) > > _____________________________________________________ > > / > > | Device: E-Series Device > > | _____________________________________________________ > > | / > > | | Mboard: E3XX SG3 > > | | product: 30675 > > | | revision: 7 > > | | serial: 3140619 > > | | mac-addr: 00:80:2f:18:76:03 > > | | FPGA Version: 255.0 > > | | FPGA git hash: 7df6290-dirty > > | | RFNoC capable: Yes > > | | > > | | Time sources: none, internal, external > > | | Clock sources: internal > > | | Sensors: temp, ref_locked > > | | _____________________________________________________ > > | | / > > | | | RX DSP: 0 > > | | | > > | | | Freq range: 0.000 to 0.000 MHz > > | | _____________________________________________________ > > | | / > > | | | RX DSP: 1 > > | | | > > | | | Freq range: 0.000 to 0.000 MHz > > | | _____________________________________________________ > > | | / > > | | | RX Dboard: A > > | | | ID: E310 MIMO XCVR (0x0110) > > | | | Serial: 313AF1D > > | | | _____________________________________________________ > > | | | / > > | | | | RX Frontend: A > > | | | | Name: FE-RX2 > > | | | | Antennas: TX/RX, RX2 > > | | | | Sensors: temp, rssi, lo_locked > > | | | | Freq range: 50.000 to 6000.000 MHz > > | | | | Gain range PGA: 0.0 to 76.0 step 1.0 dB > > | | | | Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz > > | | | | Connection Type: IQ > > | | | | Uses LO offset: No > > | | | _____________________________________________________ > > | | | / > > | | | | RX Frontend: B > > | | | | Name: FE-RX1 > > | | | | Antennas: TX/RX, RX2 > > | | | | Sensors: temp, rssi, lo_locked > > | | | | Freq range: 50.000 to 6000.000 MHz > > | | | | Gain range PGA: 0.0 to 76.0 step 1.0 dB > > | | | | Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz > > | | | | Connection Type: IQ > > | | | | Uses LO offset: No > > | | | _____________________________________________________ > > | | | / > > | | | | RX Codec: A > > | | | | Name: E3x0 RX dual ADC > > | | | | Gain Elements: None > > | | _____________________________________________________ > > | | / > > | | | TX DSP: 0 > > | | | > > | | | Freq range: 0.000 to 0.000 MHz > > | | _____________________________________________________ > > | | / > > | | | TX DSP: 1 > > | | | > > | | | Freq range: 0.000 to 0.000 MHz > > | | _____________________________________________________ > > | | / > > | | | TX Dboard: A > > | | | ID: E310 MIMO XCVR (0x0110) > > | | | Serial: 313AF1D > > | | | _____________________________________________________ > > | | | / > > | | | | TX Frontend: A > > | | | | Name: FE-TX2 > > | | | | Antennas: TX/RX > > | | | | Sensors: temp, lo_locked > > | | | | Freq range: 50.000 to 6000.000 MHz > > | | | | Gain range PGA: 0.0 to 89.8 step 0.2 dB > > | | | | Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz > > | | | | Connection Type: IQ > > | | | | Uses LO offset: No > > | | | _____________________________________________________ > > | | | / > > | | | | TX Frontend: B > > | | | | Name: FE-TX1 > > | | | | Antennas: TX/RX > > | | | | Sensors: temp, lo_locked > > | | | | Freq range: 50.000 to 6000.000 MHz > > | | | | Gain range PGA: 0.0 to 89.8 step 0.2 dB > > | | | | Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz > > | | | | Connection Type: IQ > > | | | | Uses LO offset: No > > | | | _____________________________________________________ > > | | | / > > | | | | TX Codec: A > > | | | | Name: E3x0 TX dual DAC > > | | | | Gain Elements: None > > | | _____________________________________________________ > > | | / > > | | | RFNoC blocks on this device: > > | | | > > | | | * Radio_0 > > | | | * DDC_0 > > | | | * DUC_0 > > > > [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/ > share/uhd/images/usrp_e3xx_fpga_idle_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > root@ettus-e3xx-sg3:~/newinstall# > > > > > > *I wasn’t sure that these errors were crucial so I continued with running > an example. Here’s the capture for the example.* > > > > > > root@ettus-e3xx-sg3:~/newinstall# cd ~/newinstall/usr/lib/uhd/examples/ > > root@ettus-e3xx-sg3:~/newinstall/usr/lib/uhd/examples# > ./rx_samples_to_file --freq 100e6 --gain 0 --ant TX/RX --rate 1e6 --null > > > > Creating the usrp device with: ... > > [INFO] [UHD] linux; GNU C++ version 4.9.2; Boost_105700; > UHD_4.0.0.rfnoc-devel-702-geec24d7b > > [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/ > share/uhd/images/usrp_e310_fpga_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [INFO] [E300] Initializing core control (global registers)... > > > > [INFO] [E300] Performing register loopback test... > > [INFO] [E300] Register loopback test passed > > [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000000) > > [INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000) > > [INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000002) > > [WARNING] [RFNOC] [legacy_compat] No FIFO detected. Higher transmit rates > may encounter errors. > > Using Device: Single USRP: > > Device: E-Series Device > > Mboard 0: E3XX SG3 > > RX Channel: 0 > > RX DSP: 0 > > RX Dboard: A > > RX Subdev: FE-RX2 > > RX Channel: 1 > > RX DSP: 1 > > RX Dboard: A > > RX Subdev: FE-RX1 > > TX Channel: 0 > > TX DSP: 0 > > TX Dboard: A > > TX Subdev: FE-TX2 > > TX Channel: 1 > > TX DSP: 1 > > TX Dboard: A > > TX Subdev: FE-TX1 > > > > Setting RX Rate: 1.000000 Msps... > > Actual RX Rate: 1.000000 Msps... > > > > Setting RX Freq: 100.000000 MHz... > > Actual RX Freq: 100.000000 MHz... > > > > Setting RX Gain: 0.000000 dB... > > Actual RX Gain: 0.000000 dB... > > > > Waiting for "lo_locked": ++++++++++ locked. > > > > Press Ctrl + C to stop streaming... > > ^C > > Done! > > > > [INFO] [E300] Loading FPGA image: /home/root/newinstall/usr/ > share/uhd/images/usrp_e3xx_fpga_idle_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > [ERROR] [UHD] Exception caught in safe-call. > > in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with > uhd::endianness_t _endianness = (uhd::endianness_t)1u] > > at /home/matt/e300/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:60 > > this->send_cmd_pkt(0, 0, true); -> AssertionError: (sts >> 7) & 0x1 > > in typename T::sptr e300_transport::get_buff(double) [with T = > uhd::transport::managed_send_buffer; typename T::sptr = > boost::intrusive_ptr<uhd::transport::managed_send_buffer>] > > at /home/matt/e300/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:250 > > > > root@ettus-e3xx-sg3:~/newinstall/usr/lib/uhd/examples# > > > > > > > > > > > > Again any help with the UHD errors would be appreciated. Also isn’t there > supposed to be more blocks on the device other than Radio_0, DDC_0 and > DUC_0? > > > > > > Thanks > > Matt > > > > > > > > *From:* John Medrano <[email protected]> > *Sent:* Wednesday, July 04, 2018 10:29 AM > *To:* Mathieu Vinette <[email protected]> > *Cc:* [email protected] > *Subject:* Re: [USRP-users] Building RFNOC UHD on E310 > > > > Hello, > > > > I have used the first method multiple times with no issues. > > > > Did you issue command or is your setup_env.sh file correctly configured. > You must run every time you get a new shell from E310: > > source ./setup_env.sh > > > > You may still be pointing at default version of GNU Radio installed on > E310. > > > > Run: which uhd_usrp_probe > > > > To detect which version you are using. > > > > Good luck. > > > > On Wed, Jul 4, 2018 at 8:17 AM, Mathieu Vinette via USRP-users < > [email protected]> wrote: > > Hello, > > > > I’m trying to Build RFNOC on a new E310 purchased a few months ago and > keep running into issues. I tried 2 different ways with no luck. > > > > First way was using the guide on https://kb.ettus.com/Software_ > Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_ > Radio_/_gr-ettus_from_Source > > > > And when executing the uhd_usrp_probe I get the following error: > > > > root@ettus-e3xx-sg3:~/e310# uhd_usrp_probe > > [INFO] [UHD] linux; GNU C++ version 4.9.2; Boost_105700; > UHD_4.0.0.rfnoc-devel-788-g1f8463cc > > [INFO] [E300] Loading FPGA image: /home/root/e310/usr/share/uhd/ > images/usrp_e310_fpga_sg3.bit... > > [INFO] [E300] FPGA image loaded > > [INFO] [E300] Initializing core control (global registers)... > > > > [INFO] [E300] Performing register loopback test... > > [INFO] [E300] Register loopback test passed > > Error: RuntimeError: Expected FPGA compatibility number 255.x, but got > 17.0: > > The FPGA build is not compatible with the host code build. > > Please run: > > > > "/usr/lib/uhd/utils/uhd_images_downloader.py" > > root@ettus-e3xx-sg3:~/e310# > > > > I did run the image downloader and still have the same issue. > > > > > > My second try was using pyboms from the guide on https://kb.ettus.com/ > Software_Development_on_the_E310_and_E312 > > And here’s the error I’m getting from this process. > > > > pybombs prefix init ~/prefix -R e3xx-rfnoc -a e300 > > > > > > > > PyBOMBS.install_manager - INFO - Phase 2: Recursively installing source > packages to prefix: > > PyBOMBS.install_manager - INFO - Installing package: gnuradio > > PyBOMBS.PackageManager - WARNING - A source build for package gnuradio was > requested, but binary install was found! > > Install gnuradio from source despite binary install available Y/[N]? Y > > PyBOMBS.Packager.source - WARNING - Build dir already exists: > /home/matt/prefix/src/gnuradio/build > > Configuring: (100%) [============================= > =======================================================] > > PyBOMBS.Packager.source - WARNING - Configuration failed. Re-trying with > higher verbosity. > > -- Build type not specified: defaulting to release. > > -- Build type set to Release. > > -- Extracting version information from git describe... > > -- Compiler Version: arm-oe-linux-gnueabi-gcc (GCC) 4.9.2 > > Copyright (C) 2014 Free Software Foundation, Inc. > > This is free software; see the source for copying conditions. There is NO > > warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. > > -- Compiler Flags: /home/matt/prefix/sysroots/x86_64-oesdk-linux/usr/bin/ > arm-oe-linux-gnueabi/arm-oe-linux-gnueabi-gcc:::-O3 -DNDEBUG -O2 -pipe > -g -feliminate-unused-debug-types -std=gnu99 -fvisibility=hidden > -Wsign-compare -Wall -Wno-uninitialized > > /home/matt/prefix/sysroots/x86_64-oesdk-linux/usr/bin/ > arm-oe-linux-gnueabi/arm-oe-linux-gnueabi-g++:::-O3 -DNDEBUG -O2 -pipe > -g -feliminate-unused-debug-types -fvisibility=hidden -Wsign-compare -Wall > -Wno-uninitialized > > -- ADDING PERF COUNTERS > > -- Building Static Libraries: OFF > > -- Boost version: 1.57.0 > > -- Found the following Boost libraries: > > -- date_time > > -- program_options > > -- filesystem > > -- system > > -- regex > > -- thread > > -- > > -- Checking for module SWIG > > -- Found SWIG version 3.0.2. > > -- > > -- The build system will automatically enable all components. > > -- Use -DENABLE_DEFAULT=OFF to disable components by default. > > -- > > -- Configuring python-support support... > > -- Dependency PYTHONLIBS_FOUND = TRUE > > -- Dependency SWIG_FOUND = TRUE > > -- Dependency SWIG_VERSION_CHECK = TRUE > > -- Enabling python-support support. > > -- Override with -DENABLE_PYTHON=ON/OFF > > -- > > -- Configuring testing-support support... > > -- Dependency CPPUNIT_FOUND = TRUE > > -- Enabling testing-support support. > > -- Override with -DENABLE_TESTING=ON/OFF > > -- > > -- Configuring VOLK support... > > -- Build type set to Release. > > -- Extracting version information from git describe... > > -- > > -- Python checking for python >= 2.7 > > -- Python checking for python >= 2.7 - found > > -- > > -- Python checking for mako >= 0.4.2 > > -- Python checking for mako >= 0.4.2 - found > > -- > > -- Python checking for six - python 2 and 3 compatibility library > > -- Python checking for six - python 2 and 3 compatibility library - not > found > > CMake Error at volk/CMakeLists.txt:93 (message): > > six - python 2 and 3 compatibility library required to build VOLK > > > > > > -- Configuring incomplete, errors occurred! > > See also "/home/matt/prefix/src/gnuradio/build/CMakeFiles/ > CMakeOutput.log". > > PyBOMBS.Packager.source - ERROR - Configuration failed after running at > least twice. > > PyBOMBS.Packager.source - ERROR - Problem occurred while building package > gnuradio: > > Configuration failed > > PyBOMBS.install_manager - ERROR - Error installing package gnuradio. > Aborting. > > > > > > I must be doing something wrong. Can someone help me with this build or > point me in the right direction? I’m new to this software radio world so > any kind of direction would be greatly appreciated. > > > > Thanks > > Matt > > > _______________________________________________ > USRP-users mailing list > [email protected] > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > >
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