Hi Marcus,

Even I used 1Msps or less than this sampling rate, I still saw this time
alignment issue. When I am using GNURadio system with python script instead
of using UHD API, I can run 10Msps for my 4 channel phase array receiver
without any problems. My final goal is to have 50Msps for my 4 channel
phase array receiver with dual 10 GiGe cable setup and CDUA computation for
wideband AoA detection. My desktop spec is Processors: Intel Core i9 7900X
10-Core 3.3GHz (4.3GHz TurboBoost), Memory: 32GB ORIGIN PC DDR4 Powered by
Kingston 3000MHz (4 X 8GB),.

Thanks!

All Best,
Jack






On Sun, Jul 29, 2018 at 11:59 AM, Marcus D. Leech <mle...@ripnet.com> wrote:

> On 07/29/2018 12:56 PM, Jack Yang wrote:
>
> Hi Marcus,
>
> Thanks for your mail. Yes, I am using 10GiGe interface to run the UHD C++
> code.
> Any thoughts or suggestions?
>
> All Best,
> Jack
>
> On Sun, Jul 29, 2018 at 9:35 AM, Marcus D. Leech via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>> On 07/29/2018 12:52 AM, Jack Yang via USRP-users wrote:
>>
>> Hi,
>>
>> I have rewrote "rx_samples_to_file.cpp" for making four channel coherent
>> receiver (phased-array receiver) in X310. When I executed my code, the
>> terminal showed that
>>
>> *[ERROR] [STREAMER] The receive packet handler failed to time-align
>> packets. 1002 received packets were processed by the handler. However, a
>> timestamp match could not be determined.*
>>
>> I have attached my code as the following link (
>> https://www.dropbox.com/s/x0u0tw5e65iaual/rx_samples_X310_TwinRx.cpp?dl=0).
>> The info for my UHD version is shown in below
>> *"[INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800;
>> UHD_3.11.0.HEAD-0-ga1b5c4ae"*
>>
>> Could someone guide me how to fix this issue? I am using two TwinRx with
>> a X310 for my coherent receiver. I basically followed gr-doa python
>> configuration to set up the USRP device in C++ code. However, I cannot find
>> out why the time alignment is failed in here.
>>
>> The detailed print-out message is also listed here
>>
>> Thanks!
>>
>> All Best,
>> Jack
>>
>> Creating the usrp device with: addr=192.168.40.2...
>> [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800;
>> UHD_3.11.0.HEAD-0-ga1b5c4ae
>> [INFO] [X300] X300 initialization sequence...
>> [INFO] [X300] Determining maximum frame size...
>> [INFO] [X300] Maximum frame size: 8000 bytes.
>> [INFO] [X300] Setup basic communication...
>> [INFO] [X300] Loading values from EEPROM...
>> [INFO] [X300] Setup RF frontend clocking...
>> [INFO] [X300] Radio 1x clock:200
>> [INFO] [RFNOC DMA FIFO] Running BIST for FIFO 0...
>> [INFO] [RFNOC DMA FIFO] BIST passed (Throughput: 1299 MB/s)
>> [INFO] [RFNOC DMA FIFO] Running BIST for FIFO 1...
>> [INFO] [RFNOC DMA FIFO] BIST passed (Throughput: 1316 MB/s)
>> [WARNING] [RFNOC] [0/Radio_0] defines 2 input buffer sizes, but 1 input
>> ports
>> [INFO] [RFNOC RADIO] Register loopback test passed
>> [INFO] [RFNOC RADIO] Register loopback test passed
>> [WARNING] [RFNOC] [0/Radio_1] defines 2 input buffer sizes, but 1 input
>> ports
>> [INFO] [RFNOC RADIO] Register loopback test passed
>> [INFO] [RFNOC RADIO] Register loopback test passed
>> [INFO] [CORES] Performing timer loopback test...
>> [INFO] [CORES] Timer loopback test passed
>> [INFO] [CORES] Performing timer loopback test...
>> [INFO] [CORES] Timer loopback test passed
>> Using Device: Single USRP:
>>   Device: X-Series Device
>>   Mboard 0: X310
>>   RX Channel: 0
>>     RX DSP: 0
>>     RX Dboard: A
>>     RX Subdev: TwinRX RX0
>>   RX Channel: 1
>>     RX DSP: 1
>>     RX Dboard: A
>>     RX Subdev: TwinRX RX1
>>   RX Channel: 2
>>     RX DSP: 0
>>     RX Dboard: B
>>     RX Subdev: TwinRX RX0
>>   RX Channel: 3
>>     RX DSP: 1
>>     RX Dboard: B
>>     RX Subdev: TwinRX RX1
>>   TX Channel: 0
>>     TX DSP: 0
>>     TX Dboard: A
>>     TX Subdev: Unknown (0x0094) - 0
>>   TX Channel: 1
>>     TX DSP: 0
>>     TX Dboard: B
>>     TX Subdev: Unknown (0x0094) - 0
>>
>> Setting RX Rate: 10.000000 Msps...
>> Actual RX Rate: 10.000000 Msps...
>>
>> [INFO] [MULTI_USRP]     1) catch time transition at pps edge
>> [INFO] [MULTI_USRP]     2) set times next pps (synchronously)
>> Setting RX Gain: 60.000000 dB...
>> Actual RX Gain: 60.000000 dB...
>>
>> Setting RX Freq: 900.000000 MHz...
>> Waiting for "lo_locked": + locked.
>>
>> Press Ctrl + C to stop streaming...
>> [ERROR] [STREAMER] The receive packet handler failed to time-align
>> packets. 1002 received packets were processed by the handler. However, a
>> timestamp match could not be determined.
>>
>>
>> You're presumably doing this over a 10GiGe interface?
>>
>> If you run at a lower sample-rate, like 5Msps do you see this problem?
>
>
>
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