No, I'm not aware of anyone who's tried 4 channels simultaneously yet.

Wade

On Fri, Sep 4, 2020 at 6:18 PM Rob Kossler <rkoss...@nd.edu> wrote:

> Hi Wade,
> Thanks for the info. Sounds like I might need to wait for the fixes that
> will allow multiple DRAM ports to work.
>
> Do you know if anyone has tested for the possibility of simultaneous play
> of 4 channels at 125 MS/s using Replay blocks on the N310 (assuming that we
> are not simultaneously loading new samples but only playing out)?
> Rob
>
> On Fri, Sep 4, 2020 at 5:15 PM Wade Fife <wade.f...@ettus.com> wrote:
>
>> Hi Rob,
>>
>> We actually just added the Replay to the default images, so that should
>> show up in the next release candidate, along with some fixes that will
>> allow multiple DRAM ports to work. It looks like you're missing the
>> connection to the DRAM data port. Here's an example of what to add for each
>> Replay block to the connections:
>>
>> - { srcblk: replay0, srcport: axi_ram, dstblk: _device_, dstport: dram }
>>
>> Also, make sure that MEM_ADDR_W matches the size of the memory on the
>> device (so it should be 31 for N3xx) series.
>>
>> Thanks,
>>
>> Wade
>>
>>
>> On Thu, Sep 3, 2020 at 5:28 PM Rob Kossler via USRP-users <
>> usrp-users@lists.ettus.com> wrote:
>>
>>> Hi,
>>> I am having trouble using rfnoc_replay_samples_from_file with a custom
>>> FPGA image I built (N310 XG - UHD-4.0). I used rfnoc_image_builder and
>>> manually modified the yml (see below) to include two 2-channel Replay
>>> blocks in addition to the default statically linked blocks. When I try to
>>> run the rfnoc_replay_samples_from_file example, I get the following error.
>>> Any ideas?
>>> Rob
>>>
>>> // ************* rfnoc_samples_from_file output **************
>>> $ rfnoc_replay_samples_from_file --args="addr=192.168.61.2" --file
>>> /media/ramfolder/tx_0.dat --freq 2400e6 --rate 125e6
>>> ...
>>> Replay file size:     32768 bytes (4096 qwords, 8192 samples)
>>> Record base address:  0x0
>>> Record buffer size:   32768 bytes
>>> Record fullness:      0 bytes
>>>
>>> Emptying record buffer...
>>> Record fullness:      0 bytes
>>>
>>> Sending data to be recorded...
>>> ERROR: Unable to send 8192 samples
>>>
>>>
>>> // *************  yml file used in rfnoc_image_builder ************
>>> # General parameters
>>> # -----------------------------------------
>>> schema: rfnoc_imagebuilder_args         # Identifier for the schema used
>>> to validate this file
>>> copyright: 'Ettus Research, A National Instruments Brand' # Copyright
>>> information used in file headers
>>> license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License
>>> information used in file headers
>>> version: 1.0                            # File version
>>> rfnoc_version: 1.0                      # RFNoC protocol version
>>> chdr_width: 64                          # Bit width of the CHDR bus for
>>> this image
>>> device: 'n310'
>>> default_target: 'N310_XG'
>>>
>>> # A list of all stream endpoints in design
>>> # ----------------------------------------
>>> stream_endpoints:
>>>   ep0:                       # Stream endpoint name
>>>     ctrl: True                      # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 32768                # Ingress buffer size for data
>>>   ep1:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 32768                # Ingress buffer size for data
>>>   ep2:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 32768                # Ingress buffer size for data
>>>   ep3:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 32768                # Ingress buffer size for data
>>>   ep4:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 256                  # Ingress buffer size for data
>>>   ep5:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 256                  # Ingress buffer size for data
>>>   ep6:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 256                  # Ingress buffer size for data
>>>   ep7:                       # Stream endpoint name
>>>     ctrl: False                     # Endpoint passes control traffic
>>>     data: True                      # Endpoint passes data traffic
>>>     buff_size: 256                  # Ingress buffer size for data
>>>
>>> # A list of all NoC blocks in design
>>> # ----------------------------------
>>> noc_blocks:
>>>   duc0:                      # NoC block name
>>>     block_desc: 'duc.yml'    # Block device descriptor file
>>>     parameters:
>>>       NUM_PORTS: 2
>>>   ddc0:
>>>     block_desc: 'ddc.yml'
>>>     parameters:
>>>       NUM_PORTS: 2
>>>   radio0:
>>>     block_desc: 'radio_2x64.yml'
>>>   duc1:
>>>     block_desc: 'duc.yml'
>>>     parameters:
>>>       NUM_PORTS: 2
>>>   ddc1:
>>>     block_desc: 'ddc.yml'
>>>     parameters:
>>>       NUM_PORTS: 2
>>>   radio1:
>>>     block_desc: 'radio_2x64.yml'
>>>   replay0:
>>>     block_desc: 'replay.yml'
>>>     parameters:
>>>       NUM_PORTS: 2
>>>       MEM_DATA_W: 64
>>>       MEM_ADDR_W: 30
>>>   replay1:
>>>     block_desc: 'replay.yml'
>>>     parameters:
>>>       NUM_PORTS: 2
>>>       MEM_DATA_W: 64
>>>       MEM_ADDR_W: 30
>>>
>>> # A list of all static connections in design
>>> # ------------------------------------------
>>> # Format: A list of connection maps (list of key-value pairs) with the
>>> following keys
>>> #         - srcblk  = Source block to connect
>>> #         - srcport = Port on the source block to connect
>>> #         - dstblk  = Destination block to connect
>>> #         - dstport = Port on the destination block to connect
>>> connections:
>>>   - { srcblk: ep0,    srcport: out0,  dstblk: duc0,   dstport: in_0 }
>>>   - { srcblk: duc0,   srcport: out_0, dstblk: radio0, dstport: in_0 }
>>>   - { srcblk: radio0, srcport: out_0, dstblk: ddc0,   dstport: in_0 }
>>>   - { srcblk: ddc0,   srcport: out_0, dstblk: ep0,    dstport: in0  }
>>>   - { srcblk: ep1,    srcport: out0,  dstblk: duc0,   dstport: in_1 }
>>>   - { srcblk: duc0,   srcport: out_1, dstblk: radio0, dstport: in_1 }
>>>   - { srcblk: radio0, srcport: out_1, dstblk: ddc0,   dstport: in_1 }
>>>   - { srcblk: ddc0,   srcport: out_1, dstblk: ep1,    dstport: in0  }
>>>   - { srcblk: ep2,    srcport: out0,  dstblk: duc1,   dstport: in_0 }
>>>   - { srcblk: duc1,   srcport: out_0, dstblk: radio1, dstport: in_0 }
>>>   - { srcblk: radio1, srcport: out_0, dstblk: ddc1,   dstport: in_0 }
>>>   - { srcblk: ddc1,   srcport: out_0, dstblk: ep2,    dstport: in0  }
>>>   - { srcblk: ep3,    srcport: out0,  dstblk: duc1,   dstport: in_1 }
>>>   - { srcblk: duc1,   srcport: out_1, dstblk: radio1, dstport: in_1 }
>>>   - { srcblk: radio1, srcport: out_1, dstblk: ddc1,   dstport: in_1 }
>>>   - { srcblk: ddc1,   srcport: out_1, dstblk: ep3,    dstport: in0  }
>>>   - { srcblk: ep4,    srcport: out0,  dstblk: replay0,dstport: in_0 }
>>>   - { srcblk: replay0,srcport: out_0, dstblk: ep4,    dstport: in0  }
>>>   - { srcblk: ep5,    srcport: out0,  dstblk: replay0,dstport: in_1 }
>>>   - { srcblk: replay0,srcport: out_1, dstblk: ep5,    dstport: in0  }
>>>   - { srcblk: ep6,    srcport: out0,  dstblk: replay1,dstport: in_0 }
>>>   - { srcblk: replay1,srcport: out_0, dstblk: ep6,    dstport: in0  }
>>>   - { srcblk: ep7,    srcport: out0,  dstblk: replay1,dstport: in_1 }
>>>   - { srcblk: replay1,srcport: out_1, dstblk: ep7,    dstport: in0  }
>>>   - { srcblk: radio0, srcport: ctrl_port, dstblk: _device_, dstport:
>>> ctrlport_radio0 }
>>>   - { srcblk: radio1, srcport: ctrl_port, dstblk: _device_, dstport:
>>> ctrlport_radio1 }
>>>   - { srcblk: _device_, srcport: x300_radio0, dstblk: radio0, dstport:
>>> x300_radio }
>>>   - { srcblk: _device_, srcport: x300_radio1, dstblk: radio1, dstport:
>>> x300_radio }
>>>   - { srcblk: _device_, srcport: time_keeper, dstblk: radio0, dstport:
>>> time_keeper }
>>>   - { srcblk: _device_, srcport: time_keeper, dstblk: radio1, dstport:
>>> time_keeper }
>>>
>>> # A list of all clock domain connections in design
>>> # ------------------------------------------------
>>> # Format: A list of connection maps (list of key-value pairs) with the
>>> following keys
>>> #         - srcblk  = Source block to connect (Always "_device"_)
>>> #         - srcport = Clock domain on the source block to connect
>>> #         - dstblk  = Destination block to connect
>>> #         - dstport = Clock domain on the destination block to connect
>>> clk_domains:
>>>   - { srcblk: _device_, srcport: radio,      dstblk: radio0, dstport:
>>> radio }
>>>   - { srcblk: _device_, srcport: rfnoc_chdr, dstblk: ddc0,   dstport: ce
>>>    }
>>>   - { srcblk: _device_, srcport: rfnoc_chdr, dstblk: duc0,   dstport: ce
>>>    }
>>>   - { srcblk: _device_, srcport: radio,      dstblk: radio1, dstport:
>>> radio }
>>>   - { srcblk: _device_, srcport: rfnoc_chdr, dstblk: ddc1,   dstport: ce
>>>    }
>>>   - { srcblk: _device_, srcport: rfnoc_chdr, dstblk: duc1,   dstport: ce
>>>    }
>>>   - { srcblk: _device_, srcport: dram,       dstblk: replay0,dstport:
>>> mem   }
>>>   - { srcblk: _device_, srcport: dram,       dstblk: replay1,dstport:
>>> mem   }
>>>
>>> _______________________________________________
>>> USRP-users mailing list
>>> USRP-users@lists.ettus.com
>>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>>
>>
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