On 10/07/2020 11:12 AM, Zeng, Huacheng wrote:
Dear Rob and Marcus:
Thank you for the prompt response. Based on my limited knowledge of
digital circuit, the 180 degree phase ambiguity may occur at the PLL
circuit initiation (power on) stage. After PLL is powered on, there is
no phase ambiguity. Is it right? My question actually comes to: When I
switch N310 from RX mode (in time slot 1) to TX mode (in time slot 2)
and then back to RX mode (in time slot 3), would there be a phase
ambiguity in those two RX modes (in time slots 1 & 3)?
When I used USRP N210 with SBX, I did not observe such a phase
ambiguity in this case. But when I used USRP N210 with WBX, the phase
ambiguity does exist (based on my understanding).
Thank you!
Hua
Note that the shared-LO has to be at TWICE the desired center frequency.
This is because the AD9371 chips (and other chips) use something called
a 2XLO phase-splitter to feed the mixers. A 2XLO phase-splitter
has *excellent* phase quality, but it is made from flip-flops, whose
state cannot be predicted at power up. So it's either in state 0 or
1 on power-up, leading to a 180deg phase ambiguity in the phase-split
signal going to the mixers.
My understanding on the AD9371 is that this is a power-up issue--once
it's powered up, the phase-splitter is operational and so you only
take the phase-ambiguity "hit" once on power up.
So if you're using shared-LO, and you've characterized your phase
relationships, they should not change again.
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