Hi Cédric,
I tried "set_time_unknown_pps()" but got no luck. The sample misalignment
remains the same. I suspect this is somehow related to the warning
"[WARNING] [RFNOC::GRAPH] One or more blocks timed out during flush!" from
the UHD, but have no idea about how to fix it. Thanks anyway.
-Hua
On Tue, May 18, 2021 at 9:51 AM Cédric Hannotier via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Hua,
>
> On 17/05/21 16:27, Zeng, Huacheng wrote:
> > Hi Marcus,
> >
> > Thank you for the reply. I am using SBX (40MHz) daughterboards for X310.
> > For my software setting, I'm not sure what is the best way to present the
> > details. So I copied my code below. Hopeful it is not messy for you to
> > review.
> > [...]
> > int main() {
> > [...]
> > sp.sync_opt = "internal"; //"pps", "mimo"
> > [...]
> > void sdr_dev::configure_usrp(sdr_para sp) {
> > [...]
> > // clock and time sync_opthronization
> > if (sync_opt == "pps") {
> > [...]
> > } else if (sync_opt == "mimo") {
> > [...]
> > } else {
> > usrp -> set_time_now(uhd::time_spec_t(1.0));
> > }
>
> It seems you are using set_time_now() to synchronize
> the two daughterboards inside your X310.
> Could this be related to [1]?
> Does using set_time_unknown_pps() instead of set_time_now() help?
>
> [1]
> https://lists.ettus.com/empathy/thread/YHNX5U6XFKBCV3XPC34LT3JFOG2ZGA2W?hash=YHNX5U6XFKBCV3XPC34LT3JFOG2ZGA2W#YHNX5U6XFKBCV3XPC34LT3JFOG2ZGA2W
>
> Regards
> --
>
> Cédric Hannotier
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