On 2021-08-31 4:48 a.m., hiroki_iwata--- via USRP-users wrote:
Dear community members,
I am new to touch the USRP device and design FPGA.
I would like to confirm and understand the contents (such as signal
processing blocks) in the FPGA bin file for B205mini-i distributed in
GitHub (EttusResearch).
As a first step, I installed ISE tool from Xilinx and confirm the
schematic using Project Navigator, but I cannot understand it clearly.
Does anyone know the details for signal processing on FPGA? Or Does
anyone have some materials for the design details?
Especially, I want to understand how the parameters for RFIC (such as
center frequency, bandwidth, and gain) are sent from a USB Host to the
RFIC via USB controller and FPGA.
Thank you so much in advance.
Hiroki
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The source code is freely available:
https://github.com/EttusResearch/uhd
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