Hi Ravi, our manual is pretty comprehensive: https://uhd.readthedocs.io/en/latest/md_fpga.html. For regular RFNoC builds, you don't need to invoke Vivado yourself at all. If you have more specific questions, this is a reasonable place to ask them.
--M On Fri, Oct 10, 2025 at 6:48 AM Ravi Paswan via USRP-users < [email protected]> wrote: > Hi all, > I am reaching out to gather any available technical guidance, reference > designs or documentation that could assist in enabling smooth connectivity > and workflow between the USRP platform and AMD/Xilinx Vivado tool > integration. > > > *Disclaimer: **© 2025 VVDN Technologies Pvt. Ltd. This e-mail contains > PRIVILEGED AND CONFIDENTIAL INFORMATION intended solely for the use of the > addressee(s). If you are not the intended recipient, please notify the > sender by e-mail and delete the original message. Further, you are not to > copy, disclose, or distribute this e-mail or its contents to any other > person and any such actions are unlawful.* > _______________________________________________ > USRP-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] >
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