Revision: 3132 Author: [email protected] Date: Mon Oct 26 07:38:22 2009 Log: Generate more compact XOR on 64-bit architecture when using xor to zero out registers.
When using xor to zero a 64-bit register, generate 32-bit instruction instead. (according to Intel 64-bit mode coding guidelines) previous code for zeroing RAX: xor rax, rax ==> new code for zeroing RAX: xor eax, eax The 32-bit operand form has the same semantics: It also zeroes the upper 32-bit of rax and its encoding uses 1 byte less. Review URL: http://codereview.chromium.org/330018 http://code.google.com/p/v8/source/detail?r=3132 Modified: /branches/bleeding_edge/src/x64/assembler-x64.h ======================================= --- /branches/bleeding_edge/src/x64/assembler-x64.h Fri Oct 23 02:18:19 2009 +++ /branches/bleeding_edge/src/x64/assembler-x64.h Mon Oct 26 07:38:22 2009 @@ -920,7 +920,11 @@ void testq(Register dst, Immediate mask); void xor_(Register dst, Register src) { - arithmetic_op(0x33, dst, src); + if (dst.code() == src.code()) { + arithmetic_op_32(0x33, dst, src); + } else { + arithmetic_op(0x33, dst, src); + } } void xorl(Register dst, Register src) { --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
