Reviewers: Lasse Reichstein, Message: I also considered using a form taking two registers and asserting that the second (the shift amount) was always ecx, but decided against it.
Description: Changes to Intel shift functions Change name of shifts picking the shift count from cl to sal_cl, shl_cl and shr_cl. Add special encoding of shift by one for shr which was missing it. Please review this at http://codereview.chromium.org/391073 SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/ Affected files: M src/ia32/assembler-ia32.h M src/ia32/assembler-ia32.cc M src/ia32/codegen-ia32.cc M src/ia32/stub-cache-ia32.cc M src/x64/assembler-x64.h M src/x64/codegen-x64.cc M src/x64/macro-assembler-x64.cc M src/x64/stub-cache-x64.cc M test/cctest/test-disasm-ia32.cc --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list v8-dev@googlegroups.com http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
