Reviewers: paul.l..., akos.palfi.imgtec, balazs.kilvady,
Description:
Revert "MIPS64: Fix lithium arithmetic operations for integers to
sign-extend
result."
This reverts commit 75744da2689c57c3c8c5bbff2965fe9afe602258.
revert reason:
octane failures.
BUG=
Please review this at https://codereview.chromium.org/1160143008/
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+14, -14 lines):
M src/mips64/lithium-codegen-mips64.cc
Index: src/mips64/lithium-codegen-mips64.cc
diff --git a/src/mips64/lithium-codegen-mips64.cc
b/src/mips64/lithium-codegen-mips64.cc
index
fb201c0c26ff07ee662382e40674924e5b2b17c3..1612e38524934dd4b180855237030124f669681f
100644
--- a/src/mips64/lithium-codegen-mips64.cc
+++ b/src/mips64/lithium-codegen-mips64.cc
@@ -1491,7 +1491,7 @@ void LCodeGen::DoMulI(LMulI* instr) {
DeoptimizeIf(gt, instr, Deoptimizer::kOverflow, scratch,
Operand(kMaxInt));
} else {
- __ Subu(result, zero_reg, left);
+ __ Dsubu(result, zero_reg, left);
}
break;
case 0:
@@ -1516,25 +1516,25 @@ void LCodeGen::DoMulI(LMulI* instr) {
if (base::bits::IsPowerOfTwo32(constant_abs)) {
int32_t shift = WhichPowerOf2(constant_abs);
- __ sll(result, left, shift);
+ __ dsll(result, left, shift);
// Correct the sign of the result if the constant is negative.
- if (constant < 0) __ Subu(result, zero_reg, result);
+ if (constant < 0) __ Dsubu(result, zero_reg, result);
} else if (base::bits::IsPowerOfTwo32(constant_abs - 1)) {
int32_t shift = WhichPowerOf2(constant_abs - 1);
- __ sll(scratch, left, shift);
- __ addu(result, scratch, left);
+ __ dsll(scratch, left, shift);
+ __ Daddu(result, scratch, left);
// Correct the sign of the result if the constant is negative.
if (constant < 0) __ Dsubu(result, zero_reg, result);
} else if (base::bits::IsPowerOfTwo32(constant_abs + 1)) {
int32_t shift = WhichPowerOf2(constant_abs + 1);
- __ sll(scratch, left, shift);
- __ Subu(result, scratch, left);
+ __ dsll(scratch, left, shift);
+ __ Dsubu(result, scratch, left);
// Correct the sign of the result if the constant is negative.
if (constant < 0) __ Dsubu(result, zero_reg, result);
} else {
// Generate standard code.
__ li(at, constant);
- __ Mul(result, left, at);
+ __ Dmul(result, left, at);
}
}
@@ -1558,9 +1558,9 @@ void LCodeGen::DoMulI(LMulI* instr) {
} else {
if (instr->hydrogen()->representation().IsSmi()) {
__ SmiUntag(result, left);
- __ mul(result, result, right);
+ __ Dmul(result, result, right);
} else {
- __ mul(result, left, right);
+ __ Dmul(result, left, right);
}
}
@@ -1706,10 +1706,10 @@ void LCodeGen::DoSubI(LSubI* instr) {
if (!can_overflow) {
if (right->IsStackSlot()) {
Register right_reg = EmitLoadRegister(right, at);
- __ Subu(ToRegister(result), ToRegister(left), Operand(right_reg));
+ __ Dsubu(ToRegister(result), ToRegister(left), Operand(right_reg));
} else {
DCHECK(right->IsRegister() || right->IsConstantOperand());
- __ Subu(ToRegister(result), ToRegister(left), ToOperand(right));
+ __ Dsubu(ToRegister(result), ToRegister(left), ToOperand(right));
}
} else { // can_overflow.
Register overflow = scratch0();
@@ -1898,10 +1898,10 @@ void LCodeGen::DoAddI(LAddI* instr) {
if (!can_overflow) {
if (right->IsStackSlot()) {
Register right_reg = EmitLoadRegister(right, at);
- __ Addu(ToRegister(result), ToRegister(left), Operand(right_reg));
+ __ Daddu(ToRegister(result), ToRegister(left), Operand(right_reg));
} else {
DCHECK(right->IsRegister() || right->IsConstantOperand());
- __ Addu(ToRegister(result), ToRegister(left), ToOperand(right));
+ __ Daddu(ToRegister(result), ToRegister(left), ToOperand(right));
}
} else { // can_overflow.
Register overflow = scratch0();
--
--
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