>
> Out of interest, is there any particular reason you would like to
> artificially limit register allocation for particular instructions?
>
Yes, the reasoning is experimentation with two individual concepts:
1) Code-density optimizations in ISA encoding, where certain instructions
and instruction classes may have encoding variants which do not have full
expressability for register operands.
i.e. can certain instructions occupy a denser, more-compressed
encoding. Trading off between code density, and potential introduction of
spills/moves.
2) Mixed ABI usage in compiled code (think of like mixed 32-bit and 64-bit
code on steroids)
i.e. can parts of the ISA be restricted in register usage in order
to comply with an ABI/sandbox constraint, without complete removal of
registers from the overall allocatable set.
On Thursday, November 14, 2019 at 3:45:50 AM UTC-8, Ross McIlroy wrote:
>
> I don't believe we have support for defining sub-ranges of available
> registers for individual instructions. You could of course limit the whole
> program (or function) to a subset of registers by limiting the available
> allocatable registers. Another hack would be to define a fake live-range
> for the disallowed registers that covers the instruction in question,
> although this would also prevent the use of those registers by any other
> live ranges that intersect with that instruction.
>
> Out of interest, is there any particular reason you would like to
> artificially limit register allocation for particular instructions?
>
> Cheers,
> Ross
>
>
> On Wed, 13 Nov 2019 at 21:50, <[email protected] <javascript:>> wrote:
>
>> I'm interested in the ability to restrict V8 from generating particular
>> instructions use of input/output registers to an [artificial] subset of
>> available allocatable registers, and I was curious if the constraint system
>> has this ability?
>>
>> My desire is different from the DefineFixed/UseFixed constraints, which
>> select an exact register code to be used for that operand. In my use-case,
>> I'd still like the register allocator to have freedom in choosing the exact
>> register mapping from a limited subset of registers (they can be forced to
>> be contiguous from a simplicity perspective).
>>
>> After a cursory review, none of the OperandGenerator's seem to match my
>> need at the surface - but I wanted to get some expert-level feedback in
>> case I missed something.
>>
>> Any feedback, insight, or intuition would be greatly appreciated.
>>
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