Hi Leszek,

Yes, that clears it up, thanks. We have three follow up questions.

1) Are there any plans to add additional testing infrastructure for Maglev? 
Given that codegen for some nodes is quite complicated, it could be 
beneficial to test code for some of the nodes in isolation.
2) With respect to folding, are there any plans to replace nodes with more 
specialized counterparts (e.g. how this 
<https://source.chromium.org/chromium/chromium/src/+/main:v8/src/maglev/maglev-graph-builder.cc;l=1695;drc=5d42230d2ae9adc9c0ebed6acea8c5896f04218e>
 
comment suggests)?
3) If we can significantly improve performance by moving one of the 
GenerateCode methods out of the "maglev-ir.cc" file into an 
architecture-specific folder, what is the best way to incorporate these 
changes?

Iurii
On Monday, September 4, 2023 at 10:29:48 AM UTC+1 Leszek Swirski wrote:

> Hi Iurii,
>
> Without making any strict promises, we expect the coarseness of the maglev 
> compiler to stay roughly at the level it is, with instruction-level 
> optimisations being implemented in GenerateCode methods or 
> Maglev/MacroAssembler helper methods.
>
> We're also not anticipating any large changes to the pipeline from the 
> design doc, which hasn't been updated but is still roughly accurate. The 
> guiding principle of maglev is to have only a single IR (i.e. minimise 
> reductions from high-level IR node to low-level IR node, preferring direct 
> lowering to the latter node) and minimal passes. That said, we do have a 
> second pass for trying to eliminate conversions around phis, and we _may_ 
> want to look into non-greedy inlining at some point, which would require 
> lowering calls into an inlined graph and propagating inlined information 
> through the remaining graph (likely folding away constants, known branches, 
> known checks, etc.).
>
> Does this answer your questions? Happy to expand on these.
>
> Leszek
>
> On Mon, Sep 4, 2023 at 11:21 AM Iurii Zamiatin <iurii.z...@arm.com> wrote:
>
>> Hi,
>>
>> We want to clarify something w.r.t future plans for the Maglev code 
>> generator.
>>
>> Maglev right now is a very "coarse-grained" compiler - most bytecode 
>> operations are lowered to a single Maglev node selected based on feedback 
>> (design doc for Maglev also refers to these as macro-ops). This is contrast 
>> with TF (and TS) that is way more "fine-grained" - a single node can be 
>> lowered to a CFG fragment with many low-level machine operations.
>>
>> Would it be fair to assume that Maglev will stay "coarse-grained" for the 
>> foreseeable future? If that is the case, should we assume that the best way 
>> to port machine rewriter's optimizations/instruction selection patterns 
>> from TF to Maglev is to add these optimizations to GenerateCode methods?
>>
>> Finally, what will Maglev pipeline ultimately look like? Is the design 
>> document for Maglev 
>> <https://docs.google.com/document/d/13CwgSL4yawxuYg3iNlM-4ZPCB8RgJya6b8H_E2F-Aek>
>>  
>> up to date with respect to future plans? Will there be any infrastructure 
>> for folding nodes outside of the graph builder?
>>
>> Thanks,
>> Iurii 
>>
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>>
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