Revision: 18030
Author: [email protected]
Date: Fri Nov 22 18:13:52 2013 UTC
Log: MIPS: Fix and simplify code aging.
This commit fixes a lot of test failures that we saw earlier in the
buildbots
(http://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20mips%20-%20sim/builds/3034/steps/Check/logs/stdio).
In some very rare cases the code age stub address can be 0xXXXX0000 and in
this case the li maco instruction emits only 1 instruction (instead of the
expected 2). Thus the code age sequence will be 6 instructions long instead
of 7, which breaks the code aging feature. This change makes sure that li
always emits 2 instructions and it also simplifies the code aging sequence.
Also fixes a small mistake in the simulator at the jalr instruction.
BUG=
[email protected]
Review URL: https://codereview.chromium.org/83583003
http://code.google.com/p/v8/source/detail?r=18030
Modified:
/branches/bleeding_edge/src/mips/assembler-mips-inl.h
/branches/bleeding_edge/src/mips/builtins-mips.cc
/branches/bleeding_edge/src/mips/codegen-mips.cc
/branches/bleeding_edge/src/mips/macro-assembler-mips.cc
/branches/bleeding_edge/src/mips/simulator-mips.cc
/branches/bleeding_edge/src/mips/simulator-mips.h
=======================================
--- /branches/bleeding_edge/src/mips/assembler-mips-inl.h Tue Nov 5
10:14:48 2013 UTC
+++ /branches/bleeding_edge/src/mips/assembler-mips-inl.h Fri Nov 22
18:13:52 2013 UTC
@@ -260,16 +260,14 @@
Code* RelocInfo::code_age_stub() {
ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
return Code::GetCodeFromTargetAddress(
- Memory::Address_at(pc_ + Assembler::kInstrSize *
- (kNoCodeAgeSequenceLength - 1)));
+ Assembler::target_address_at(pc_ + Assembler::kInstrSize));
}
void RelocInfo::set_code_age_stub(Code* stub) {
ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
- Memory::Address_at(pc_ + Assembler::kInstrSize *
- (kNoCodeAgeSequenceLength - 1)) =
- stub->instruction_start();
+ Assembler::set_target_address_at(pc_ + Assembler::kInstrSize,
+ stub->instruction_start());
}
=======================================
--- /branches/bleeding_edge/src/mips/builtins-mips.cc Fri Nov 22 10:21:47
2013 UTC
+++ /branches/bleeding_edge/src/mips/builtins-mips.cc Fri Nov 22 18:13:52
2013 UTC
@@ -813,12 +813,9 @@
// internal frame to make the code faster, since we shouldn't have to do
stack
// crawls in MakeCodeYoung. This seems a bit fragile.
- __ mov(a0, ra);
- // Adjust a0 to point to the head of the PlatformCodeAge sequence
+ // Set a0 to point to the head of the PlatformCodeAge sequence.
__ Subu(a0, a0,
Operand((kNoCodeAgeSequenceLength - 1) * Assembler::kInstrSize));
- // Restore the original return address of the function
- __ mov(ra, at);
// The following registers must be saved and restored when calling
through to
// the runtime:
@@ -855,12 +852,9 @@
// save/restore the registers without worrying about which of them
contain
// pointers.
- __ mov(a0, ra);
- // Adjust a0 to point to the head of the PlatformCodeAge sequence
+ // Set a0 to point to the head of the PlatformCodeAge sequence.
__ Subu(a0, a0,
Operand((kNoCodeAgeSequenceLength - 1) * Assembler::kInstrSize));
- // Restore the original return address of the function
- __ mov(ra, at);
// The following registers must be saved and restored when calling
through to
// the runtime:
=======================================
--- /branches/bleeding_edge/src/mips/codegen-mips.cc Wed Nov 20 18:22:18
2013 UTC
+++ /branches/bleeding_edge/src/mips/codegen-mips.cc Fri Nov 22 18:13:52
2013 UTC
@@ -642,8 +642,8 @@
*age = kNoAgeCodeAge;
*parity = NO_MARKING_PARITY;
} else {
- Address target_address = Memory::Address_at(
- sequence + Assembler::kInstrSize * (kNoCodeAgeSequenceLength - 1));
+ Address target_address = Assembler::target_address_at(
+ sequence + Assembler::kInstrSize);
Code* stub = GetCodeFromTargetAddress(target_address);
GetCodeAgeAndParity(stub, age, parity);
}
@@ -662,17 +662,18 @@
} else {
Code* stub = GetCodeAgeStub(isolate, age, parity);
CodePatcher patcher(sequence, young_length / Assembler::kInstrSize);
- // Mark this code sequence for FindPlatformCodeAgeSequence()
+ // Mark this code sequence for FindPlatformCodeAgeSequence().
patcher.masm()->nop(Assembler::CODE_AGE_MARKER_NOP);
- // Save the function's original return address
- // (it will be clobbered by Call(t9))
- patcher.masm()->mov(at, ra);
- // Load the stub address to t9 and call it
- patcher.masm()->li(t9,
- Operand(reinterpret_cast<uint32_t>(stub->instruction_start())));
- patcher.masm()->Call(t9);
- // Record the stub address in the empty space for GetCodeAgeAndParity()
- patcher.masm()->emit_code_stub_address(stub);
+ // Load the stub address to t9 and call it,
+ // GetCodeAgeAndParity() extracts the stub address from this
instruction.
+ patcher.masm()->li(
+ t9,
+ Operand(reinterpret_cast<uint32_t>(stub->instruction_start())),
+ CONSTANT_SIZE);
+ patcher.masm()->nop(); // Prevent jalr to jal optimization.
+ patcher.masm()->jalr(t9, a0);
+ patcher.masm()->nop(); // Branch delay slot nop.
+ patcher.masm()->nop(); // Pad the empty space.
}
}
=======================================
--- /branches/bleeding_edge/src/mips/macro-assembler-mips.cc Fri Nov 22
17:37:34 2013 UTC
+++ /branches/bleeding_edge/src/mips/macro-assembler-mips.cc Fri Nov 22
18:13:52 2013 UTC
@@ -4532,15 +4532,15 @@
// Pre-age the code.
Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
nop(Assembler::CODE_AGE_MARKER_NOP);
- // Save the function's original return address
- // (it will be clobbered by Call(t9)).
- mov(at, ra);
- // Load the stub address to t9 and call it.
+ // Load the stub address to t9 and call it,
+ // GetCodeAgeAndParity() extracts the stub address from this
instruction.
li(t9,
- Operand(reinterpret_cast<uint32_t>(stub->instruction_start())));
- Call(t9);
- // Record the stub address in the empty space for
GetCodeAgeAndParity().
- emit_code_stub_address(stub);
+ Operand(reinterpret_cast<uint32_t>(stub->instruction_start())),
+ CONSTANT_SIZE);
+ nop(); // Prevent jalr to jal optimization.
+ jalr(t9, a0);
+ nop(); // Branch delay slot nop.
+ nop(); // Pad the empty space.
} else {
Push(ra, fp, cp, a1);
nop(Assembler::CODE_AGE_SEQUENCE_NOP);
=======================================
--- /branches/bleeding_edge/src/mips/simulator-mips.cc Fri Sep 27 10:42:51
2013 UTC
+++ /branches/bleeding_edge/src/mips/simulator-mips.cc Fri Nov 22 18:13:52
2013 UTC
@@ -1722,6 +1722,7 @@
int64_t& i64hilo,
uint64_t& u64hilo,
int32_t& next_pc,
+ int32_t& return_addr_reg,
bool& do_interrupt) {
// Every local variable declared here needs to be const.
// This is to make sure that changed values are sent back to
@@ -1782,6 +1783,7 @@
case JR:
case JALR:
next_pc = get_register(instr->RsValue());
+ return_addr_reg = instr->RdValue();
break;
case SLL:
alu_out = rt << sa;
@@ -1986,6 +1988,7 @@
int32_t current_pc = get_pc();
// Next pc
int32_t next_pc = 0;
+ int32_t return_addr_reg = 31;
// Set up the variables if needed before executing the instruction.
ConfigureTypeRegister(instr,
@@ -1993,6 +1996,7 @@
i64hilo,
u64hilo,
next_pc,
+ return_addr_reg,
do_interrupt);
// ---------- Raise exceptions triggered.
@@ -2258,7 +2262,8 @@
Instruction* branch_delay_instr = reinterpret_cast<Instruction*>(
current_pc+Instruction::kInstrSize);
BranchDelayInstructionDecode(branch_delay_instr);
- set_register(31, current_pc + 2 * Instruction::kInstrSize);
+ set_register(return_addr_reg,
+ current_pc + 2 * Instruction::kInstrSize);
set_pc(next_pc);
pc_modified_ = true;
break;
=======================================
--- /branches/bleeding_edge/src/mips/simulator-mips.h Wed Jun 19 17:20:25
2013 UTC
+++ /branches/bleeding_edge/src/mips/simulator-mips.h Fri Nov 22 18:13:52
2013 UTC
@@ -289,6 +289,7 @@
int64_t& i64hilo,
uint64_t& u64hilo,
int32_t& next_pc,
+ int32_t& return_addr_reg,
bool& do_interrupt);
void DecodeTypeImmediate(Instruction* instr);
--
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