Hi,
Thanks for reviewing my code.
Here are some details and answers on several points.
About the contributor licence agreement: I have given it to my boss.
It will be sent quite soon.
I have corrected everything you told, except one issue I detail below.
I hope the fixes will be enough to have it work on a 64bit Linux. I
don't have one so please let me know of other future errors.
I worked on the simulator, the disassembler, and the debugger. (The
arm code was really helpful. I mainly adapted it.) They all work, but
the simulator still needs a few tests. However most instructions seem
to work fine. I am currently working on some tests like the ones in
test-assembler-<arch>.cc and test-disasm-<arch>.cc . This should be
done today. Should I commit the code when the tests are implemented?
There may still be a few mistakes, but there would at least be a good
basis to work on.
About the issue I did not change:
The concerned review urls are
http://codereview.chromium.org/549079/diff/1/11#newcode153
and http://codereview.chromium.org/549079/diff/1/11#newcode153
I had to use functions with such template when it uses conditional
execution.
On MIPS there is 'cmp' instruction or conditional execution like on
ARM. MIPS assembly has instead contional branch instructions like "beq
r1 r2 offset".
In MIPS CodeGenerator::Branch function s5 and s6 registers are loaded
with the values to be compared and the condition is a property of the
CodeGenerator. I do this because when generating code comparisons are
done before their result is evaluated to branch.
However using this kind of solution for other functions would require
to setup s5 and s6 every time we want to compare something. That would
be really unefficient.
I can't see another simple way to pass the arguments to functions like
DeferredCodeBranch().
We could get rid of the preprocessor #ifdef by using the mips template
for other architectures, which would then not use the extra arguments,
but that would be ugly...
Feel free to ask more details if you need.
Alexandre
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