On 06/10/2010 07:38 PM, Bart Van Assche wrote:
Hi,
I'm using ELDK 4.2 on an AMCC kilauea board:
All on the host:
svn co svn://svn.valgrind.org/valgrind/branches/VALGRIND_3_5_BRANCH
VALGRIND_PATH="VALGRIND_3_5_BRANCH"
The patches are attached as well.
This patch is to remove the altivec instructions
patch -p1 < patches/altivec.diff
This patch is to make the linker happy.
In function `__divsf3':
/opt/eldk/build/ppc-2008-04-01/work/usr/src/denx/BUILD/crosstool-0.43/build/gcc-4.2.2-glibc-20070515T2025-eldk/powerpc-linux/gcc-4.2.2/gcc/config/soft-fp/divsf3.c:44:
undefined reference to `abort'
patch -p1 < patches/abort.diff
cd $VALGRIND_PATH
source ../../../env.sh
make distclean
echo "autogen"
./autogen.sh --host=powerpc-linux --target=powerpc-linux --disable-tls
--prefix=$ELDK_PREFIX/eldk-4.2-ppc_4xx/ppc_4xx
echo "configure"
./configure --host=powerpc-linux --target=powerpc-linux --disable-tls
--prefix=$ELDK_PREFIX/eldk-4.2-ppc_4xx/ppc_4xx
echo "make"
make
So far so bad.
With make install on the host we fail here:
win.h'
'/work/rber/eldk-4.2-ppc_4xx/ppc_4xx/include/valgrind/vki/vki-scnums-darwin.h'
make[3]: Leaving directory
`/home/rber/projects/ldd/ldd_for_trainer/src/31_valgrind/VALGRIND_3_5_BRANCH/include'
make[2]: Leaving directory
`/home/rber/projects/ldd/ldd_for_trainer/src/31_valgrind/VALGRIND_3_5_BRANCH/include'
Making install in VEX
make[2]: Entering directory
`/home/rber/projects/ldd/ldd_for_trainer/src/31_valgrind/VALGRIND_3_5_BRANCH/VEX'
make install-am
make[3]: Entering directory
`/home/rber/projects/ldd/ldd_for_trainer/src/31_valgrind/VALGRIND_3_5_BRANCH/VEX'
make[4]: Entering directory
`/home/rber/projects/ldd/ldd_for_trainer/src/31_valgrind/VALGRIND_3_5_BRANCH/VEX'
test -z "/work/rber/eldk-4.2-ppc_4xx/ppc_4xx/lib/valgrind" || /bin/mkdir
-p "/work/rber/eldk-4.2-ppc_4xx/ppc_4xx/lib/valgrind"
/usr/bin/install -c -m 644 'libvex-ppc32-linux.a'
'/work/rber/eldk-4.2-ppc_4xx/ppc_4xx/lib/valgrind/libvex-ppc32-linux.a'
powerpc-linux-ranlib
'/work/rber/eldk-4.2-ppc_4xx/ppc_4xx/lib/valgrind/libvex-ppc32-linux.a'
/bin/sh: line 4: powerpc-linux-ranlib: command not found
Which is strange, since powerpc-linux-ranlib is definitely on the patch.
Please advise.
Regards,
Robert
--
Robert Berger
Embedded Software Specialist
Reliable Embedded Systems
Consulting Training Engineering
Tel.: (+30) 697 593 3428
Fax.:(+30) 210 684 7881
URL: http://www.reliableembeddedsystems.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
..."Beware of bugs in the above code; I have only proved it correct, not
tried it." - Donald Knuth, in a memo to Peter Van Emde Boas titled
"Notes on the van Emde Boas construction of priority deques: An
instructive use of recursion"
My public pgp key is available at:
http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x90320BF1
Index: 31_valgrind/VALGRIND_3_5_BRANCH/coregrind/m_libcproc.c
===================================================================
--- 31_valgrind.orig/VALGRIND_3_5_BRANCH/coregrind/m_libcproc.c 2010-06-13 06:47:28.700426089 -0400
+++ 31_valgrind/VALGRIND_3_5_BRANCH/coregrind/m_libcproc.c 2010-06-13 06:48:55.640955732 -0400
@@ -717,6 +717,11 @@
(*atforks[i].child)(tid);
}
+/* Don't do this at home - just to make the linker happy */
+void abort(void)
+{
+ int i=0;
+}
/*--------------------------------------------------------------------*/
/*--- end ---*/
Index: 31_valgrind/VALGRIND_3_5_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linux.S
===================================================================
--- 31_valgrind.orig/VALGRIND_3_5_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linux.S 2010-06-13 06:41:34.936570852 -0400
+++ 31_valgrind/VALGRIND_3_5_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linux.S 2010-06-13 06:43:17.384601374 -0400
@@ -8,7 +8,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2005-2009 Cerion Armour-Brown <[email protected]>
+ Copyright (C) 2005-2010 Cerion Armour-Brown <[email protected]>
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
@@ -131,37 +131,37 @@
cmplwi 5,0
beq LafterVMX1
- /* VRSAVE save word : 32 bytes */
- mfspr 5,256 /* vrsave reg is spr number 256 */
- stw 5,244(1)
-
- /* Alignment padding : 4 bytes */
-
- /* Vector reg save area (quadword aligned) : 192 bytes */
- li 5,224
- stvx 31,5,1
- li 5,208
- stvx 30,5,1
- li 5,192
- stvx 29,5,1
- li 5,176
- stvx 28,5,1
- li 5,160
- stvx 27,5,1
- li 5,144
- stvx 26,5,1
- li 5,128
- stvx 25,5,1
- li 5,112
- stvx 25,5,1
- li 5,96
- stvx 23,5,1
- li 5,80
- stvx 22,5,1
- li 5,64
- stvx 21,5,1
- li 5,48
- stvx 20,5,1
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE save word : 4 bytes at r1[476 .. 479] */
+// mfspr 5,256 /* vrsave reg is spr number 256 */
+// stw 5,476(1)
+//
+// /* Vector reg save area (quadword aligned):
+// 192 bytes at r1[480 .. 671] */
+// li 5,656
+// stvx 31,5,1
+// li 5,640
+// stvx 30,5,1
+// li 5,624
+// stvx 29,5,1
+// li 5,608
+// stvx 28,5,1
+// li 5,592
+// stvx 27,5,1
+// li 5,576
+// stvx 26,5,1
+// li 5,560
+// stvx 25,5,1
+// li 5,544
+// stvx 25,5,1
+// li 5,528
+// stvx 23,5,1
+// li 5,512
+// stvx 22,5,1
+// li 5,496
+// stvx 21,5,1
+// li 5,480
+// stvx 20,5,1
LafterVMX1:
/* Save cr */
@@ -218,8 +218,9 @@
cmplwi 5,0
beq LafterVMX2
- vspltisw 3,0x0 /* generate zero */
- mtvscr 3
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// vspltisw 3,0x0 /* generate zero */
+// mtvscr 3
LafterVMX2:
/* make a stack frame for the code we are calling */
@@ -415,17 +416,18 @@
cmplwi 11,0
beq LafterVMX8
- /* Check VSCR[NJ] == 1 */
- /* first generate 4x 0x00010000 */
- vspltisw 4,0x1 /* 4x 0x00000001 */
- vspltisw 5,0x0 /* zero */
- vsldoi 6,4,5,0x2 /* <<2*8 => 4x 0x00010000 */
- /* retrieve VSCR and mask wanted bits */
- mfvscr 7
- vand 7,7,6 /* gives NJ flag */
- vspltw 7,7,0x3 /* flags-word to all lanes */
- vcmpequw. 8,6,7 /* CR[24] = 1 if v6 == v7 */
- bt 24,invariant_violation /* branch if all_equal */
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* Check VSCR[NJ] == 1 */
+// /* first generate 4x 0x00010000 */
+// vspltisw 4,0x1 /* 4x 0x00000001 */
+// vspltisw 5,0x0 /* zero */
+// vsldoi 6,4,5,0x2 /* <<2*8 => 4x 0x00010000 */
+// /* retrieve VSCR and mask wanted bits */
+// mfvscr 7
+// vand 7,7,6 /* gives NJ flag */
+// vspltw 7,7,0x3 /* flags-word to all lanes */
+// vcmpequw. 8,6,7 /* CR[24] = 1 if v6 == v7 */
+// bt 24,invariant_violation /* branch if all_equal */
LafterVMX8:
/* otherwise we're OK */
@@ -502,35 +504,36 @@
cmplwi 11,0
beq LafterVMX9
- /* VRSAVE */
- lwz 4,244(1)
- mfspr 4,256 /* VRSAVE reg is spr number 256 */
-
- /* Vector regs */
- li 4,224
- lvx 31,4,1
- li 4,208
- lvx 30,4,1
- li 4,192
- lvx 29,4,1
- li 4,176
- lvx 28,4,1
- li 4,160
- lvx 27,4,1
- li 4,144
- lvx 26,4,1
- li 4,128
- lvx 25,4,1
- li 4,112
- lvx 24,4,1
- li 4,96
- lvx 23,4,1
- li 4,80
- lvx 22,4,1
- li 4,64
- lvx 21,4,1
- li 4,48
- lvx 20,4,1
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE */
+// lwz 4,476(1)
+// mtspr 4,256 /* VRSAVE reg is spr number 256 */
+//
+// /* Vector regs */
+// li 4,656
+// lvx 31,4,1
+// li 4,640
+// lvx 30,4,1
+// li 4,624
+// lvx 29,4,1
+// li 4,608
+// lvx 28,4,1
+// li 4,592
+// lvx 27,4,1
+// li 4,576
+// lvx 26,4,1
+// li 4,560
+// lvx 25,4,1
+// li 4,544
+// lvx 24,4,1
+// li 4,528
+// lvx 23,4,1
+// li 4,512
+// lvx 22,4,1
+// li 4,496
+// lvx 21,4,1
+// li 4,480
+// lvx 20,4,1
LafterVMX9:
/* reset lr & sp */
------------------------------------------------------------------------------
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