Hi
When the machine code is 0x4503, the op is cmp, but this is
the T2 format , N bit(7-bit) is 0 , so the thumb instrunction cmp-hi is
unhandled. And the decode action is failure .
The 0x4503 machine code is generate by clang4.0\5.0\6.0, the
machine cpu can run this machine.
The valgrind source is below , valgrind 3.12 , 3.13, 3.14 is
the same:
The guest_arm_toIR.c
case BITS8(0,1,0,0,0,1,0,1): {
/* ---------------- CMP(HI) Rd, Rm ---------------- */
UInt h1 = INSN0(7,7);
UInt h2 = INSN0(6,6);
UInt rM = (h2 << 3) | INSN0(5,3);
UInt rN = (h1 << 3) | INSN0(2,0);
if (h1 != 0 || h2 != 0) { -------------------when h1 is zero, it mean
cmp-hi instruction is not handle, and the decode is failured., and I comment
this line ,the result is okay. Is it okay.
IRTemp argL = newTemp(Ity_I32);
IRTemp argR = newTemp(Ity_I32);
assign( argL, getIRegT(rN) );
assign( argR, getIRegT(rM) );
/* Update flags regardless of whether in an IT block or not. */
setFlags_D1_D2( ARMG_CC_OP_SUB, argL, argR, condT );
DIP("cmphi r%u, r%u\n", rN, rM);
goto decode_success;
}
break;
}
CMP T2 format:
T2
[cid:image001.png@01D3CC57.350C3590]
T2 variant
CMP{<c>}{<q>} <Rn>, <Rm> // <Rn> and <Rm> not both from R0-R7
Decode for this encoding
n = UInt(N:Rn); m = UInt(Rm);
(shift_t, shift_n) = (SRType_LSL, 0);
if n < 8 && m < 8 then UNPREDICTABLE;
if n == 15 || m == 15 then UNPREDICTABLE;
CONSTRAINED UNPREDICTABLE behavior
If n < 8 && m < 8, then one of the following behaviors must occur:
* The instruction is UNDEFINED.
* The instruction executes as NOP.
* The instruction executes as described, with no change to its behavior and no
additional side effects.
* The condition flags become UNKNOWN.
BR
Owen
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