Gal Hammer has posted comments on this change.
Change subject: Change source of CPU sockets/cores to "/sys" and add cpuThreads.
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Patch Set 2: I would prefer that you didn't submit this
(4 inline comments)
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File vdsm/caps.py
Line 83: findregex = re.compile('^cpu[0-9]+')
Do you need to compile the regex each time? (e.g. Can you put it outside the
for loop?).
Using something like this could save you some "if"s and nested code:
re = re.compile('^cpu[0-9]+')
cpu_dirs = [ f for f in os.listdir("/sys/devices/system/cpu/") if re.match(f) ]
Line 94: ## 0-7,64-71
I'm not sure but I think you can handle all these cases with one regular
expression.
Line 105:
This code looks similar (the csl and tsl calc). Can you join it to a function?
Line 116: except:
Please log the exception.
Also can you please write which exception are expected? Without that even
Python's syntax errors will silencelly get discarded.
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Gerrit-MessageType: comment
Gerrit-Change-Id: I1619e3d9e042bc801c988f099d3b84922f4e03d3
Gerrit-PatchSet: 2
Gerrit-Project: vdsm
Gerrit-Branch: master
Gerrit-Owner: Amador Pahim <[email protected]>
Gerrit-Reviewer: Amador Pahim <[email protected]>
Gerrit-Reviewer: Dan Kenigsberg <[email protected]>
Gerrit-Reviewer: Gal Hammer <[email protected]>
Gerrit-Reviewer: Shu Ming <[email protected]>
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