On Mon, 25 Nov 2002, Kyosti Malkki wrote:

> Chapter 5 "I2C Bus Interface" of MSP34x0D datasheet describes conditions
> when SCL is held low to allow time for internal processing.

We discovered another bug in i2c-algo-bit; clock cycle high time after
msp34xx releases SCL was not guaranteed. In practice this means msp34xx
will miss the client acknowledge clock, and you get MSP Error #1 etc.

Fixed in CVS, feedback welcome.

-- 
  Ky�sti M�lkki
  [EMAIL PROTECTED]



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