# HG changeset patch
# User Praveen Tiwari <prav...@multicorewareinc.com>
# Date 1426235545 -19800
# Node ID fbd334ec88d7966ccf1c4dd0f30c3ca3f626f0b0
# Parent 6461985f33ac6fc5b205879bbb0f2a535226ca76
asm-intra_pred_ang16_28: improved, 865.16c -> 456.44c
AVX2:
intra_ang_16x16[28] 19.82x 456.44 9047.79
SSE4:
intra_ang_16x16[28] 10.36x 865.16 8962.21
diff -r 6461985f33ac -r fbd334ec88d7 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Sun Mar 15 11:58:32 2015 -0500
+++ b/source/common/x86/asm-primitives.cpp Fri Mar 13 14:02:25 2015 +0530
@@ -1507,6 +1507,7 @@
p.cu[BLOCK_8x8].intra_pred[24] = x265_intra_pred_ang8_24_avx2;
p.cu[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;
p.cu[BLOCK_16x16].intra_pred[25] = x265_intra_pred_ang16_25_avx2;
+ p.cu[BLOCK_16x16].intra_pred[28] = x265_intra_pred_ang16_28_avx2;
// copy_sp primitives
p.cu[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;
diff -r 6461985f33ac -r fbd334ec88d7 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h Sun Mar 15 11:58:32 2015 -0500
+++ b/source/common/x86/intrapred.h Fri Mar 13 14:02:25 2015 +0530
@@ -184,6 +184,7 @@
void x265_intra_pred_ang8_24_avx2(pixel* dst, intptr_t dstStride, const pixel*
srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel*
srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_25_avx2(pixel* dst, intptr_t dstStride, const
pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang16_28_avx2(pixel* dst, intptr_t dstStride, const
pixel* srcPix, int dirMode, int bFilter);
void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix,
int bLuma);
void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix,
int bLuma);
void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix,
int bLuma);
diff -r 6461985f33ac -r fbd334ec88d7 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Sun Mar 15 11:58:32 2015 -0500
+++ b/source/common/x86/intrapred8.asm Fri Mar 13 14:02:25 2015 +0530
@@ -123,6 +123,17 @@
db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26,
6, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4
db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30,
2, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0
+
+ALIGN 32
+c_ang16_mode_28: db 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27,
5, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10
+ db 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17,
15, 17, 15, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20
+ db 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7,
25, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30
+ db 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29,
3, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8
+ db 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 19,
13, 19, 13, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18
+ db 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9,
23, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28
+ db 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31,
1, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6
+ db 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21,
11, 21, 11, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
+
ALIGN 32
;; (blkSize - 1 - x)
pw_planar4_0: dw 3, 2, 1, 0, 3, 2, 1, 0
@@ -10727,3 +10738,46 @@
lea r0, [r0 + 4 * r1]
INTRA_PRED_ANG16_25 6
RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang16_28, 3, 5, 6
+ mova m0, [pw_1024]
+ mova m5, [intra_pred_shuff_0_8]
+ lea r3, [3 * r1]
+ lea r4, [c_ang16_mode_28]
+
+ vbroadcasti128 m1, [r2 + 1]
+ pshufb m1, m5
+ vbroadcasti128 m2, [r2 + 9]
+ pshufb m2, m5
+
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, 0
+ INTRA_PRED_ANG16_MC0 r0 + 2 * r1, r0 + r3, 1
+
+ lea r0, [r0 + 4 * r1]
+
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, 2
+
+ vbroadcasti128 m1, [r2 + 2]
+ pshufb m1, m5
+ vbroadcasti128 m2, [r2 + 10]
+ pshufb m2, m5
+
+ INTRA_PRED_ANG16_MC0 r0 + 2 * r1, r0 + r3, 3
+
+ lea r0, [r0 + 4 * r1]
+ lea r4, [r4 + 4 * mmsize]
+
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, 0
+ INTRA_PRED_ANG16_MC0 r0 + 2 * r1, r0 + r3, 1
+
+ vbroadcasti128 m1, [r2 + 3]
+ pshufb m1, m5
+ vbroadcasti128 m2, [r2 + 11]
+ pshufb m2, m5
+
+ lea r0, [r0 + 4 * r1]
+
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, 2
+ INTRA_PRED_ANG16_MC0 r0 + 2 * r1, r0 + r3, 3
+ RET
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