# HG changeset patch
# User David T Yuen <[email protected]>
# Date 1431117274 25200
# Node ID 9ca14d0867a3d9d10e8d74d9a4ec1431f937a1fd
# Parent 80223399435bd842f2cb66cd4178c863397c4beb
asm: interp_4tap_vert_pp sse2
This replaces c code for 4x4, 4x8, 4x16 and 4x32
64-bit
/test/TestBench --testbench interp | grep vpp | grep " 4x"
chroma_vpp[ 4x4] 2.11x 1000.01 2107.46
chroma_vpp[ 4x2] 2.13x 524.99 1117.38
chroma_vpp[ 4x8] 2.28x 1932.54 4400.88
chroma_vpp[ 4x16] 2.29x 3782.51 8675.26
chroma_vpp[ 4x8] 2.28x 1927.55 4400.15
chroma_vpp[ 4x4] 2.10x 1005.00 2107.43
chroma_vpp[ 4x16] 2.29x 3782.51 8674.96
chroma_vpp[ 4x32] 2.27x 7475.00 16994.84
chroma_vpp[ 4x4] 2.10x 1005.00 2107.45
chroma_vpp[ 4x8] 2.28x 1927.50 4400.29
chroma_vpp[ 4x16] 2.30x 3777.50 8675.26
32-bit
./test/TestBench --testbench interp | grep vpp | grep " 4x"
chroma_vpp[ 4x4] 2.33x 1159.99 2697.42
chroma_vpp[ 4x2] 2.39x 580.00 1387.46
chroma_vpp[ 4x8] 2.59x 2185.00 5662.72
chroma_vpp[ 4x16] 2.64x 4205.00 11117.68
chroma_vpp[ 4x8] 2.59x 2185.00 5662.75
chroma_vpp[ 4x4] 2.29x 1177.50 2697.49
chroma_vpp[ 4x16] 2.65x 4202.50 11117.68
chroma_vpp[ 4x32] 2.65x 8242.49 21837.50
chroma_vpp[ 4x4] 2.29x 1177.49 2697.42
chroma_vpp[ 4x8] 2.59x 2184.99 5662.75
chroma_vpp[ 4x16] 2.64x 4205.00 11117.68
diff -r 80223399435b -r 9ca14d0867a3 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri May 08 13:08:21 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Fri May 08 13:34:34 2015 -0700
@@ -1373,7 +1373,17 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_2x4].filter_vpp =
x265_interp_4tap_vert_pp_2x4_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_2x8].filter_vpp =
x265_interp_4tap_vert_pp_2x8_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vpp =
x265_interp_4tap_vert_pp_4x2_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_vpp =
x265_interp_4tap_vert_pp_4x4_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x8].filter_vpp =
x265_interp_4tap_vert_pp_4x8_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x16].filter_vpp =
x265_interp_4tap_vert_pp_4x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_2x16].filter_vpp =
x265_interp_4tap_vert_pp_2x16_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_4x4].filter_vpp =
x265_interp_4tap_vert_pp_4x4_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_4x8].filter_vpp =
x265_interp_4tap_vert_pp_4x8_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_4x16].filter_vpp =
x265_interp_4tap_vert_pp_4x16_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_4x32].filter_vpp =
x265_interp_4tap_vert_pp_4x32_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_4x4].filter_vpp =
x265_interp_4tap_vert_pp_4x4_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_4x8].filter_vpp =
x265_interp_4tap_vert_pp_4x8_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_4x16].filter_vpp =
x265_interp_4tap_vert_pp_4x16_sse2;
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
p.pu[LUMA_4x4].luma_hpp = x265_interp_8tap_horiz_pp_4x4_sse2;
diff -r 80223399435b -r 9ca14d0867a3 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Fri May 08 13:08:21 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Fri May 08 13:34:34 2015 -0700
@@ -1239,6 +1239,139 @@
RET
;-----------------------------------------------------------------------------
+; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst,
intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W4_H4_sse2 1
+INIT_XMM sse2
+%if ARCH_X86_64
+cglobal interp_4tap_vert_pp_4x%1, 4, 6, 9
+ pxor m8, m8
+%else
+cglobal interp_4tap_vert_pp_4x%1, 4, 6, 8
+%endif
+
+ mov r4d, r4m
+ sub r0, r1
+
+%ifdef PIC
+ lea r5, [tabw_ChromaCoeff]
+ movh m0, [r5 + r4 * 8]
+%else
+ movh m0, [tabw_ChromaCoeff + r4 * 8]
+%endif
+
+ mova m1, [pw_32]
+ lea r5, [3 * r1]
+ punpcklqdq m0, m0
+
+%assign x 1
+%rep %1/4
+ movd m2, [r0]
+ movd m3, [r0 + r1]
+ movd m4, [r0 + 2 * r1]
+ movd m5, [r0 + r5]
+
+ punpcklbw m2, m3
+ punpcklbw m6, m4, m5
+ punpcklwd m2, m6
+
+ movhlps m6, m2
+ WORD_TO_DOUBLE m2
+ WORD_TO_DOUBLE m6
+ pmaddwd m2, m0
+ pmaddwd m6, m0
+ packssdw m2, m6
+
+ lea r0, [r0 + 4 * r1]
+ movd m6, [r0]
+
+ punpcklbw m3, m4
+ punpcklbw m7, m5, m6
+ punpcklwd m3, m7
+
+ movhlps m7, m3
+ WORD_TO_DOUBLE m3
+ WORD_TO_DOUBLE m7
+ pmaddwd m3, m0
+ pmaddwd m7, m0
+ packssdw m3, m7
+
+ pshuflw m7, m2, q2301
+ pshufhw m7, m7, q2301
+ paddw m2, m7
+ pshuflw m7, m3, q2301
+ pshufhw m7, m7, q2301
+ paddw m3, m7
+ psrld m2, 16
+ psrld m3, 16
+ packssdw m2, m3
+
+ paddw m2, m1
+ psraw m2, 6
+
+ movd m7, [r0 + r1]
+
+ punpcklbw m4, m5
+ punpcklbw m3, m6, m7
+ punpcklwd m4, m3
+
+ movhlps m3, m4
+ WORD_TO_DOUBLE m4
+ WORD_TO_DOUBLE m3
+ pmaddwd m4, m0
+ pmaddwd m3, m0
+ packssdw m4, m3
+
+ movd m3, [r0 + 2 * r1]
+
+ punpcklbw m5, m6
+ punpcklbw m7, m3
+ punpcklwd m5, m7
+
+ movhlps m3, m5
+ WORD_TO_DOUBLE m5
+ WORD_TO_DOUBLE m3
+ pmaddwd m5, m0
+ pmaddwd m3, m0
+ packssdw m5, m3
+
+ pshuflw m7, m4, q2301
+ pshufhw m7, m7, q2301
+ paddw m4, m7
+ pshuflw m7, m5, q2301
+ pshufhw m7, m7, q2301
+ paddw m5, m7
+ psrld m4, 16
+ psrld m5, 16
+ packssdw m4, m5
+
+ paddw m4, m1
+ psraw m4, 6
+ packuswb m2, m4
+
+ movd [r2], m2
+ psrldq m2, 4
+ movd [r2 + r3], m2
+ lea r2, [r2 + 2 * r3]
+ psrldq m2, 4
+ movd [r2], m2
+ psrldq m2, 4
+ movd [r2 + r3], m2
+
+%if x < %1/4
+ lea r2, [r2 + 2 * r3]
+%endif
+%assign x x+1
+%endrep
+ RET
+%endmacro
+
+ FILTER_V4_W4_H4_sse2 4
+ FILTER_V4_W4_H4_sse2 8
+ FILTER_V4_W4_H4_sse2 16
+ FILTER_V4_W4_H4_sse2 32
+
+;-----------------------------------------------------------------------------
; void interp_4tap_horiz_pp_2x4(pixel *src, intptr_t srcStride, pixel *dst,
intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------
INIT_XMM sse4
diff -r 80223399435b -r 9ca14d0867a3 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Fri May 08 13:08:21 2015 -0700
+++ b/source/common/x86/ipfilter8.h Fri May 08 13:34:34 2015 -0700
@@ -909,6 +909,10 @@
void x265_interp_4tap_vert_pp_2x8_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_2x16_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_4x2_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_4x4_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_4x8_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_4x16_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_4x32_sse2(const pixel *src, intptr_t srcStride,
pixel *dst, intptr_t dstStride, int coeffIdx);
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
#undef LUMA_SS_FILTERS
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