On 10/10/07, R. Timothy Edwards <[EMAIL PROTECTED]> wrote: > > Having worked heavily with Verilog for about a year now, I have reached > the conclusion that it is a lousy way to define circuitry (apart from > the fact that it is a much better way to define circuitry than VHDL, > which is even lousier). I've found it much easier to define (relatively > simple) systems with schematics, and restrict Verilog mostly to big > combinatorial logic blocks, for which it is well suited.
I totally agree with you on verilog and VHDL as lousy. VHDL would maybe be good as a backend saving file format that can be simulated directly, but to gain knowledge of a system it is a hassle. Every time I hit the xcircuit home page I see that system drawing there and wish that such a high-level drawing could be done in xcircuit and actually then having a netlist in verilog, vhdl, spice, spectre or a mixture like after defining a configuration like with the hierarchy editor in Cadence. Now I have to do the visualization in Visio and then do a human translation from visio to verilog/vhdl composer etc. which is error prone and require windows. Drawing system block diagrams in xcircuit is very fast. If I could have those block diagrams represent real blocks and netlist them that would be very good. Problem is that one has to define a lot of pins on the symbols which is a hassle when you want to represent a big logigal bus with just one thick line on the schematic. > > I assume that since digital flows are used to build microprocessors, > the software tools to manage the flows are highly valued, very lucrative, > and therefore are rarely to be found in the public domain. And the managers of companies are targeted with FUD from those manufacturers. -- Svenn _______________________________________________ Xcircuit-dev mailing list [email protected] http://www.opencircuitdesign.com/mailman/listinfo/xcircuit-dev
