On Tue, Nov 11, 2014 at 03:30:54AM +0000, Zhang, Yang Z wrote:
> Konrad Rzeszutek Wilk wrote on 2014-11-10:
> > On Mon, Nov 10, 2014 at 05:08:09AM +0000, Zhang, Yang Z wrote:
> >> Konrad Rzeszutek Wilk wrote on 2014-01-16:
> >>> On Mon, Jan 13, 2014 at 11:51:28AM +0000, Jan Beulich wrote:
> >>>>>>> On 13.01.14 at 12:38, Ian Campbell <ian.campb...@citrix.com>
> > wrote:
> >>>>> On Mon, 2014-01-13 at 11:30 +0000, Jan Beulich wrote:
> >>>>>> In fact I can't see where this would be forced off:
> >>>>>> xc_cpuid_x86.c only does so in the PV case, and all
> >>>>>> hvm_pse1gb_supported() is that the CPU supports it and the
> >>>>>> domain
> > uses HAP.
> >>>>> 
> >>>>> Took me a while to spot it too:
> >>>>> static void intel_xc_cpuid_policy( [...]
> >>>>>             case 0x80000001: {
> >>>>>                 int is_64bit = hypervisor_is_64bit(xch) &&
> >>>>> is_pae;
> >>>>> 
> >>>>>                 /* Only a few features are advertised in Intel's
> >>>>>                 0x80000001. */ regs[2] &= (is_64bit ?
> >>> bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
> >>>>> 
> >>> bitmaskof(X86_FEATURE_ABM);
> >>>>>                 regs[3] &= ((is_pae ? bitmaskof(X86_FEATURE_NX) :
> >>>>> 0)
> >>> |
> >>>>>                             (is_64bit ? bitmaskof(X86_FEATURE_LM) :
> >>>>>                             0) | (is_64bit ?
> >>>>>                             bitmaskof(X86_FEATURE_SYSCALL) : 0) |
> >>>>>                             (is_64bit ?
> >>> bitmaskof(X86_FEATURE_RDTSCP) : 0));
> >>>>>                 break;
> >>>>>             }
> >>>>> Which masks anything which is not explicitly mentioned. (PAGE1GB
> >>>>> is in regs[3], I think).
> >>>> 
> >>>> Ah, okay. The funs of white listing on HVM vs black listing on PV
> >>>> again.
> >>>> 
> >>>>> The AMD version is more permissive:
> >>>>> 
> >>>>>         regs[3] &= (0x0183f3ff | /* features shared with
> >>> 0x00000001:EDX */
> >>>>>                     (is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
> >>>>>                     (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
> >>>>>                     bitmaskof(X86_FEATURE_SYSCALL) |
> >>>>>                     bitmaskof(X86_FEATURE_MP) |
> >>>>>                     bitmaskof(X86_FEATURE_MMXEXT) |
> >>>>>                     bitmaskof(X86_FEATURE_FFXSR) |
> >>>>>                     bitmaskof(X86_FEATURE_3DNOW) |
> >>>>>                     bitmaskof(X86_FEATURE_3DNOWEXT)); (but I
> >>>>> didn't check if PAGE1GB is in that magic number...)
> >>>> 
> >>>> It's not - it's bit 26.
> >>> 
> >>> So.. it sounds to me like everybody is in the agreement that this
> >>> is the right thing to do (enable it if the hypervisor has it enabled)?
> >>> 
> >>> And the next thing is actually come up with a patch to do some of
> >>> this plumbing - naturally for Xen 4.5?
> >> 
> >> Hi, Konrad,
> >> 
> >> Is there any patch to turn on the 1GB hugepages? If no, we are happy
> >> to give
> > a patch to do it.
> > 
> > I have not see a patch for this, and I would be quite happy to see
> > patch developed for this!
> 
> OK. We will provide a patch ASAP.

Excellent. Looking forward to it!
> 
> Best regards,
> Yang
> 
> 

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