At 10:09 +0530 on 09 Dec (1418116195), vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com> > > In pl011.c, when TX interrupt is received > serial_tx_interrupt() is called to push next > characters. If TX buffer is empty, serial_tx_interrupt() > does not disable TX interrupt and hence pl011 UART > irq handler pl011_interrupt() always sees TX interrupt > status set in MIS register and cpu does not come out of > UART irq handler. > > With this patch, mask TX interrupt by writing 0 to > IMSC register when TX buffer is empty and unmask by > writing 1 to IMSC register before sending characters. > > Signed-off-by: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com>
Reviewed-by: Tim Deegan <t...@xen.org> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
