So far only the VT-d UR masking was being done for them.
Signed-off-by: Jan Beulich <jbeul...@suse.com>
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -440,6 +440,9 @@ void pci_vtd_quirk(const struct pci_dev
seg, bus, dev, func);
break;
+ /* Xeon E5/E7 v2 */
+ case 0x0e00: /* host bridge */
+ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */
/* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */
case 0x3400 ... 0x3407: /* host bridges */
case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */
VT-d: make XSA-59 workaround fully cover XeonE5/E7 v2
So far only the VT-d UR masking was being done for them.
Signed-off-by: Jan Beulich <jbeul...@suse.com>
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -440,6 +440,9 @@ void pci_vtd_quirk(const struct pci_dev
seg, bus, dev, func);
break;
+ /* Xeon E5/E7 v2 */
+ case 0x0e00: /* host bridge */
+ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */
/* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */
case 0x3400 ... 0x3407: /* host bridges */
case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */
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