Julien, The details of this issue can be found in the current mailing list. Please have a look at http://lists.xen.org/archives/html/xen-devel/2014-09/msg04250.html. This is exactly the same behaviour we are observing when running on our arm setup.
The fix changes spin_lock_irq/spin_unlock_irq to spin_lock_irq_save/spin_lock_irq_restore, since context_save executed right from IRQ level. The arm interrupt handling differs from x86. ARM is handling context_saved with IRQ disabled in CPSR, though x86 has IRQs on. Thus it is failing on ASSERT inside spin_lock_irq when running on ARM. I guess it should work on x86, so this issue is ARM platform specific. On Fri, Jan 30, 2015 at 6:10 PM, Julien Grall <julien.gr...@linaro.org> wrote: > On 30/01/15 15:56, Andrew Cooper wrote: > > On 30/01/15 15:46, Julien Grall wrote: > >> Hello Denys, > >> > >> On 30/01/15 15:40, Denis Drozdov wrote: > >>> From: denys drozdov <denys.droz...@globallogic.com> > >>> > >>> Update RT scheduler to run on arm platform > >> You need to give more background of the problem (i.e why you have to > >> disable the IRQ on ARM). > >> > >> As the scheduler is common with x86, I would expect the problem is also > >> happening on this architecture. > > > > Changing a spinlock_irq into an irqsave is safe, functionally speaking, > > but it is concerning that the scheduler appears to be called in > > different interrupt states between architectures. > > For instance credit2 is also using vcpu_schedule_lock_irq... Although, > IIRC, it's not used by default. So it has to be fixed too on ARM. > > In any case, the commit message needs more background such as stack > trace and/or explaining why we have to take spinlock_irq. > > This may also need to document context_saved to explain the IRQs may not > be enabled when this function is called. > > Regards, > > -- > Julien Grall > -- Denis Drozdov GlobalLogic M +(380)988969537 S denis.drozdov www.globallogic.com <http://www.globallogic.com/> http://www.globallogic.com/email_disclaimer.txt
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