>>> On 11.02.15 at 16:03, <vijay.kil...@gmail.com> wrote: > On Wed, Feb 11, 2015 at 8:25 PM, Andrew Cooper > <andrew.coop...@citrix.com> wrote: >> On 11/02/15 14:50, Vijay Kilari wrote: >>> Hi , >>> >>> I just glaced at the x86 code, here nr_irqs are set to 1024, which > includes >>> normal irq's and MSI's. Memory for these descriptors are allocated at boot > time. >>> is it correct? >>> >>> int __init init_irq_data(void) >>> { >>> >>> ... >>> for (vector = 0; vector < NR_VECTORS; ++vector) >>> this_cpu(vector_irq)[vector] = INT_MIN; >>> >>> irq_desc = xzalloc_array(struct irq_desc, nr_irqs); >>> >>> ... >>> } >>> >>> >>> In xen/include/asm-x86/irq.h >>> >>> #define MSI_IRQ(irq) ((irq) >= nr_irqs_gsi && (irq) < nr_irqs) >> >> What do you think is incorrect about it? > > Nothing wrong with it. > > I am trying to add MSI support for arm64 where the number of > MSI interrupts are not limited to 1024. It can support large number of > MSI's.
So where did you spot this 1024? What I find (and wrote) is if ( nr_irqs == 0 ) nr_irqs = cpu_has_apic ? max(16U + num_present_cpus() * NR_DYNAMIC_VECTORS, 8 * nr_irqs_gsi) : nr_irqs_gsi; else if ( nr_irqs < 16 ) nr_irqs = 16; Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel