Hi Andre,
On 03/04/17 21:28, Andre Przywara wrote:
The INT command sets a given LPI identified by a DeviceID/EventID pair
as pending and thus triggers it to be injected.
Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
---
xen/arch/arm/vgic-v3-its.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index cc1d7a0..dd43eaf 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -297,6 +297,33 @@ static int its_handle_clear(struct virt_its *its, uint64_t
*cmdptr)
return 0;
}
+static int its_handle_int(struct virt_its *its, uint64_t *cmdptr)
+{
+ uint32_t devid = its_cmd_get_deviceid(cmdptr);
+ uint32_t eventid = its_cmd_get_id(cmdptr);
+ struct pending_irq *p;
+ struct vcpu *vcpu;
+ uint32_t vlpi;
+
+ if ( !read_itte(its, devid, eventid, &vcpu, &vlpi) )
+ return -1;
+
+ p = lpi_to_pending(its->d, vlpi);
See my question about pending_irq locking earlier on.
+ if ( !p )
+ return -1;
+
+ /*
+ * If the LPI is enabled, inject it.
+ * If not, store the pending state to inject it once it gets enabled later.
+ */
+ if ( test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) )
+ vgic_vcpu_inject_irq(vcpu, vlpi);
+ else
+ set_bit(GIC_IRQ_GUEST_LPI_PENDING, &p->status);
+
+ return 0;
+}
+
#define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its,
@@ -337,6 +364,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct
virt_its *its,
case GITS_CMD_CLEAR:
ret = its_handle_clear(its, cmdptr);
break;
+ case GITS_CMD_INT:
+ ret = its_handle_int(its, cmdptr);
+ break;
case GITS_CMD_SYNC:
/* We handle ITS commands synchronously, so we ignore SYNC. */
break;
Cheers,
--
Julien Grall
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