>>> On 24.04.17 at 19:54, <mohit.gamb...@oracle.com> wrote: > --- a/arch/x86/include/arch/msr-index.h > +++ b/arch/x86/include/arch/msr-index.h > @@ -38,6 +38,17 @@ > #define MSR_GS_BASE 0xc0000101 > #define MSR_SHADOW_GS_BASE 0xc0000102 > > +#define MSR_IA32_PMC(n) (0x000000c1 + (n)) > +#define MSR_IA32_PERFEVTSEL(n) (0x00000186 + (n)) > +#define MSR_IA32_DEBUGCTL 0x000001d9
This still sits in the middle of PMU ones, despite not being purely PMU related. Jan > +#define MSR_IA32_FIXED_CTR(n) (0x00000309 + (n)) > +#define MSR_IA32_PERF_CAPABILITIES 0x00000345 > +#define MSR_IA32_FIXED_CTR_CTRL 0x0000038d > +#define MSR_IA32_PERF_GLOBAL_CTRL 0x0000038f > +#define MSR_IA32_PERF_GLOBAL_STATUS 0x0000038e > +#define MSR_IA32_PERF_GLOBAL_OVF_CTRL 0x00000390 > +#define MSR_IA32_A_PMC(n) (0x000004c1 + (n)) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
