On 20/07/17 12:06, Roger Pau Monné wrote:
On Thu, Jul 20, 2017 at 11:47:04AM +0100, Julien Grall wrote:
Slide 18 shows only for DomU ?
ARM folks believe this is not needed for Dom0 in the ARM case, I don't
have an opinion, I know it's certainly mandatory for x86 PVH Dom0.
That was 8 months ago, you managed to convince me we should also trap for
DOM0 last time we met at the Haymakers :).
Right, my bad. I was indeed confused. We spoke during the design
session about ARM not needing to trap MSI/MSI-X probably (which x86
must do).
It will depend on the MSI controllers. For GICv3 ITS, it will not need
to trap them for Dom0 because we expose the same number of controllers
as the host and the MSIs will be configured directly via the virtual
interrupt controller.
This might be different for other controllers, but I haven't yet fully
looked at them yet.
Cheers,
--
Julien Grall
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