Hi Florian, Julien, On 02/08/17 14:32, Julien Grall wrote: > On 26/07/17 14:12, Florian Jakobsmeier wrote: >> i was just testing the single step implementation and realized that the >> before mentioned solution is not fully working. I'm still trying to >> enable SS for a VM on Xen.
>> To test my implementation i wrote a small Kernel Module and started it >> in the DomU. The module only contains a loop which increments a counter >> and prints its value. >> Right after loading the moduleI start the single step mechanism in the >> Dom0 for the VM (again with xen-access). >> As soon as i start the SS the VM will stop working. >> The ARM ARM (D2-1956 - ARM DDI 0487B.a ID033117) states that, in order >> to enables software step: >> >> A debugger enables MDSCR_EL1.SS = 1 >> >> Executes an ERET ...with SPSR.SS = 1, and you need to ERET with PSTATE.D disabled (which I assume Xen always has). This then becomes the guest's PSTATE.SS bit, which suppresses the single-step exception until it has stepped one instruction. >> The PE executes the instruction to be single-stepped >> >> Takes a software step exception on the next instruction >> My guess is that by setting the needed SS registers ever time when we >> leave the guest, the configuration won't allow the guest to execute the >> "to be single stepped instruction" >> Before executing the (first) instruction the VM will generate the SS >> exception (as desired). In the hypervisor we will set the SS registers >> again, which could hinder the VM to execute the instruction (which we >> want because we already generated an SS exception for this instruction) >> and instead generate a second SS exception for it. This will lead to the >> second PC print in the single step handler >> But I'm not able to find any proof for this. I'm afraid the ARM-ARM could be clearer about how this works. (It's had me confused all week!). The state machine in figure D2-4 (D2.12.3 the software step state machine) should help. I haven't looked at Xen (or your patch), but from your description it sounds like you are entering the guest with the debug state machine in active-pending state, then taking a single-step exception immediately. You never actually execute the instruction-to-be-stepped. Instead you want to enter the guest in active-not-pending state, the rules for this are in 'D2.12.4 Entering the active-not-pending state'. Thanks, James _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
