From: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com> ITS translation space contains GITS_TRANSLATOR register which is written by device to raise LPI. This space needs to mapped to every domain address space so that device can access GITS_TRANSLATOR register using SMMU
Signed-off-by: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com> --- xen/arch/arm/vgic-v3-its.c | 33 +++++++++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 48c880a..e7e587e 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -1504,7 +1504,35 @@ static const struct mmio_handler_ops vgic_gits_mmio_handler = { .write_handler = vgic_v3_gits_mmio_write, }; -int vgic_its_domain_init(struct domain *d) +/* + * Map the 64K ITS translation space in guest. + * This is required purely for device smmu writes. + */ + +static int vgic_map_translation_space(struct domain *d) +{ + u64 addr, size; + int ret; + addr = d->arch.vits->phys_base + SZ_64K; + size = SZ_64K; + + ret = map_mmio_regions(d, + paddr_to_pfn(addr & PAGE_MASK), + DIV_ROUND_UP(size, PAGE_SIZE), + paddr_to_pfn(addr & PAGE_MASK)); + + if ( ret ) + { + printk(XENLOG_ERR "Unable to map to dom%d access to" + " 0x%"PRIx64" - 0x%"PRIx64"\n", + d->domain_id, + addr & PAGE_MASK, PAGE_ALIGN(addr + size) - 1); + } + + return ret; +} + +int vgic_its_domain_init(struct domain *d) { d->arch.vits = xzalloc(struct vgic_its); if ( d->arch.vits == NULL ) @@ -1516,9 +1544,10 @@ int vgic_its_domain_init(struct domain *d) register_mmio_handler(d, &vgic_gits_mmio_handler, d->arch.vits->phys_base, SZ_64K); - return 0; + return vgic_map_translation_space(d); } + /* * Local variables: * mode: C -- 1.7.9.5 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel