On Nov 21, 2017, at 11:37 AM, Jan Beulich <jbeul...@suse.com<mailto:jbeul...@suse.com>> wrote:
On 21.11.17 at 11:45, <george.dun...@citrix.com<mailto:george.dun...@citrix.com>> wrote: On 11/21/2017 08:11 AM, Jan Beulich wrote: On 13.11.17 at 16:41, <george.dun...@citrix.com<mailto:george.dun...@citrix.com>> wrote: +### ARM/SMMUv1 + + Status: Supported + +### ARM/SMMUv2 + + Status: Supported Do these belong here, when IOMMU isn't part of the corresponding x86 patch? Since there was recently a time when these weren't supported, I think it's useful to have them in here. (Julien, let me know if you think otherwise.) Do you think it would be useful to include an IOMMU line for x86? At this point of the series I would surely have said "yes". The later PCI passthrough additions state this implicitly at least (by requiring an IOMMU for passthrough to be supported at all). But even then saying so explicitly may be better. How much do we specifically need to break down? AMD / Intel? What about something like this? ### IOMMU Status, AMD IOMMU: Supported Status, Intel VT-d: Supported Status, ARM SMMUv1: Supported Status, ARM SMMUv2: Supported -George
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