Hi Chen, On 23/05/2015 15:52, Chen Baozi wrote:
From: Chen Baozi <baoz...@gmail.com>Use the AFF1 value of ICC_SGI1R_EL1 when injecting SGI in vGIC, which expands the number of supported vCPU more than 16 that target list bitmap can hold independently. Signed-off-by: Chen Baozi <baoz...@gmail.com> --- xen/arch/arm/vgic.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 7b387b7..27bd137 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -367,13 +367,19 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int for_each_set_bit( vcpuid, &vcpu_mask, d->max_vcpus ) { - if ( d->vcpu[vcpuid] != NULL && !is_vcpu_online(d->vcpu[vcpuid]) ) + /* + * XXX: We assumes that only AFF1 and target list are used in + * ICC_SGI1R_EL1. + */ + int real_id = vcpuid + ((sgir >> 16) & 0xff) * 16; +
This is not the right way to do it. vgic_to_sgi is common with GICv2 and GICv3 and should stay like that.
Even if we take aside the GICv2 problem, the code is buggy as it only works when the SGI is sent to a list of VCPUs (i.e SGI_TARGET_LIST).
Overall this should be done in vgic_v3_to_sgi by setting the correct bit in vcpu_mask. Although this will require to find another type for vcpu_mask as it's only able to store 64 cpus.
Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
