On 16/06/15 14:13, David Vrabel wrote:
> On 16/06/15 13:57, Julien Grall wrote:
>> On 16/06/15 12:59, Jan Beulich wrote:
>>>>>> On 16.06.15 at 13:14, <julien.gr...@citrix.com> wrote:
>>>> On 15/06/2015 16:48, David Vrabel wrote:
>>>>> diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
>>>>> index 44ea92d..a0ff9d2 100644
>>>>> --- a/xen/include/xen/sched.h
>>>>> +++ b/xen/include/xen/sched.h
>>>>> @@ -129,7 +129,7 @@ struct evtchn
>>>>>   #endif
>>>>>       } ssid;
>>>>>   #endif
>>>>> -};
>>>>> +} __attribute__((aligned(64)));
>>>>
>>>> Why don't you use __cacheline_aligned?
>>>
>>> That would double the size on x86, for little or no benefit.
>>
>> Well, the cache line size is not necessarily 64 bytes on every
>> architecture. In the case of ARM, the cache line depends on the
>> processor version.
>>
>> __cacheline_aligned is the only way to ensure that the cache line is not
>> shared on ARM.
>>
>> AFAIU, the goal of this patch is to avoid sharing the cache line. If
>> not, the commit message is misleading because it claims that a cache
>> line is always 64 bytes...
> 
> We want to avoid sharing the cache line where we can do so for no
> additional memory cost.

I would expand the commit message to make clear that we may not share
the cache line. The "64 bytes (cache line)" is confusing and without any
background it can be interpreted wrongly.

Regards,

-- 
Julien Grall

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